Search

Natalia A. Gondarenko

Examiner (ID: 11539, Phone: (571)272-2284 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
933
Issued Applications
588
Pending Applications
124
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19981961 [patent_doc_number] => 12349463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Display panel, manufacturing method thereof, and display device [patent_app_type] => utility [patent_app_number] => 17/265228 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 1124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17265228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/265228
Display panel, manufacturing method thereof, and display device May 18, 2020 Issued
Array ( [id] => 19245754 [patent_doc_number] => 12016219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Display substrate and manufacturing method thereof, display panel, and display device [patent_app_type] => utility [patent_app_number] => 17/279855 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17279855 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/279855
Display substrate and manufacturing method thereof, display panel, and display device May 18, 2020 Issued
Array ( [id] => 16286354 [patent_doc_number] => 20200279956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => ENABLING RESIDUE FREE GAP FILL BETWEEN NANOSHEETS [patent_app_type] => utility [patent_app_number] => 16/877574 [patent_app_country] => US [patent_app_date] => 2020-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877574 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/877574
Enabling residue free gap fill between nanosheets May 18, 2020 Issued
Array ( [id] => 18073733 [patent_doc_number] => 11532573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Method for forming semiconductor device [patent_app_type] => utility [patent_app_number] => 15/930972 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930972 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/930972
Method for forming semiconductor device May 12, 2020 Issued
Array ( [id] => 18507658 [patent_doc_number] => 11705487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Transistors having reduced parasitics and enhanced performance [patent_app_type] => utility [patent_app_number] => 16/872575 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 8261 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872575 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872575
Transistors having reduced parasitics and enhanced performance May 11, 2020 Issued
Array ( [id] => 18220079 [patent_doc_number] => 11595036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => FinFET thyristors for protecting high-speed communication interfaces [patent_app_type] => utility [patent_app_number] => 16/863830 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 68 [patent_no_of_words] => 12819 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863830 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/863830
FinFET thyristors for protecting high-speed communication interfaces Apr 29, 2020 Issued
Array ( [id] => 19079598 [patent_doc_number] => 11948978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage [patent_app_type] => utility [patent_app_number] => 16/857703 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12126 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857703 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857703
Field-effect transistors (FETs) employing edge transistor current leakage suppression to reduce FET current leakage Apr 23, 2020 Issued
Array ( [id] => 16724064 [patent_doc_number] => 20210091211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/857621 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857621 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857621
Semiconductor device Apr 23, 2020 Issued
Array ( [id] => 17700140 [patent_doc_number] => 11373873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Asymmetrical plug technique for GaN devices [patent_app_type] => utility [patent_app_number] => 16/857049 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6001 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857049
Asymmetrical plug technique for GaN devices Apr 22, 2020 Issued
Array ( [id] => 16226429 [patent_doc_number] => 20200251546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => ORGANIC LIGHT EMITTING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/855746 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855746
Organic light emitting display apparatus Apr 21, 2020 Issued
Array ( [id] => 17381314 [patent_doc_number] => 11239347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Method for making a transistor of which the active region includes a semimetal material [patent_app_type] => utility [patent_app_number] => 16/854968 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4673 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854968
Method for making a transistor of which the active region includes a semimetal material Apr 21, 2020 Issued
Array ( [id] => 16210557 [patent_doc_number] => 20200243547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => Methods Used in Forming an Array of Memory Cells [patent_app_type] => utility [patent_app_number] => 16/848718 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848718 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848718
Methods used in forming an array of memory cells Apr 13, 2020 Issued
Array ( [id] => 17310370 [patent_doc_number] => 11211497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/848145 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 48 [patent_no_of_words] => 8998 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848145 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848145
Semiconductor device Apr 13, 2020 Issued
Array ( [id] => 17926063 [patent_doc_number] => 11469327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Doped polar layers and semiconductor device incorporating same [patent_app_type] => utility [patent_app_number] => 16/842535 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 26345 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842535
Doped polar layers and semiconductor device incorporating same Apr 6, 2020 Issued
Array ( [id] => 17758271 [patent_doc_number] => 11398570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Doped polar layers and semiconductor device incorporating same [patent_app_type] => utility [patent_app_number] => 16/842596 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 26343 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842596
Doped polar layers and semiconductor device incorporating same Apr 6, 2020 Issued
Array ( [id] => 17544301 [patent_doc_number] => 11309436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/838708 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4885 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838708 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838708
Semiconductor memory device Apr 1, 2020 Issued
Array ( [id] => 17661008 [patent_doc_number] => 20220181473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Segmented Power Diode Structure with Improved Reverse Recovery [patent_app_type] => utility [patent_app_number] => 17/600812 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17600812 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/600812
Segmented power diode structure with improved reverse recovery Mar 31, 2020 Issued
Array ( [id] => 17623377 [patent_doc_number] => 11342443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Process of forming an electronic device including a transistor structure [patent_app_type] => utility [patent_app_number] => 16/833237 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8575 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833237
Process of forming an electronic device including a transistor structure Mar 26, 2020 Issued
Array ( [id] => 17018620 [patent_doc_number] => 11088267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Semiconductor device with diode and silicon controlled rectifier (SCR) [patent_app_type] => utility [patent_app_number] => 16/823334 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4273 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823334
Semiconductor device with diode and silicon controlled rectifier (SCR) Mar 18, 2020 Issued
Array ( [id] => 16332403 [patent_doc_number] => 20200303369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SILICON-CONTROLLED-RECTIFIER ELECTROSTATIC PROTECTION STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/823556 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823556
Silicon-controlled-rectifier electrostatic protection structure and fabrication method thereof Mar 18, 2020 Issued
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