Search

Natalia A. Gondarenko

Examiner (ID: 8910)

Most Active Art Unit
2891
Art Unit(s)
2891
Total Applications
939
Issued Applications
593
Pending Applications
117
Abandoned Applications
251

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18835340 [patent_doc_number] => 20230403867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => Memory Arrays Comprising Vertically-Alternating Tiers of Insulative Material and Memory Cells and Methods of Forming a Memory Array [patent_app_type] => utility [patent_app_number] => 18/239063 [patent_app_country] => US [patent_app_date] => 2023-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239063 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239063
Memory arrays comprising vertically-alternating tiers of insulative material and memory cells and methods of forming a memory array Aug 27, 2023 Issued
Array ( [id] => 19057131 [patent_doc_number] => 20240099100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/451682 [patent_app_country] => US [patent_app_date] => 2023-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18451682 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/451682
DISPLAY DEVICE Aug 16, 2023 Pending
Array ( [id] => 19951282 [patent_doc_number] => 12322653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Self-aligned metal gate for multigate device and method of forming thereof [patent_app_type] => utility [patent_app_number] => 18/231076 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 44 [patent_no_of_words] => 6642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231076 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231076
Self-aligned metal gate for multigate device and method of forming thereof Aug 6, 2023 Issued
Array ( [id] => 18789499 [patent_doc_number] => 20230378172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE WITH CONTROLLABLE CHANNEL LENGTH AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/366350 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366350
Semiconductor device with controllable channel length and manufacturing method thereof Aug 6, 2023 Issued
Array ( [id] => 18991247 [patent_doc_number] => 20240063216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/364494 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364494 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364494
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE Aug 2, 2023 Pending
Array ( [id] => 19887008 [patent_doc_number] => 12272741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance [patent_app_type] => utility [patent_app_number] => 18/364679 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364679 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364679
Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance Aug 2, 2023 Issued
Array ( [id] => 18812948 [patent_doc_number] => 20230387285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/364479 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364479 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364479
NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE Aug 2, 2023 Pending
Array ( [id] => 19814096 [patent_doc_number] => 12245528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Memory device with composite spacer [patent_app_type] => utility [patent_app_number] => 18/362781 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362781
Memory device with composite spacer Jul 30, 2023 Issued
Array ( [id] => 18789642 [patent_doc_number] => 20230378347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/361585 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361585 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361585
Semiconductor structure and method for manufacturing the same Jul 27, 2023 Issued
Array ( [id] => 18774591 [patent_doc_number] => 20230369422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => TRANSISTOR, ELECTRONIC COMPONENT, AND TERMINAL DEVICE [patent_app_type] => utility [patent_app_number] => 18/361009 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361009
TRANSISTOR, ELECTRONIC COMPONENT, AND TERMINAL DEVICE Jul 27, 2023 Pending
Array ( [id] => 18774650 [patent_doc_number] => 20230369481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/227329 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227329 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227329
High electron mobility transistor and method for forming the same Jul 27, 2023 Issued
Array ( [id] => 18812676 [patent_doc_number] => 20230387013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => POWER RAIL AND SIGNAL LINE ARRANGEMENT IN INTEGRATED CIRCUITS HAVING STACKED TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/361666 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361666 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361666
Power rail and signal line arrangement in integrated circuits having stacked transistors Jul 27, 2023 Issued
Array ( [id] => 19751606 [patent_doc_number] => 20250040171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICE HAVING A DOPED REGION UNDERLYING A GATE LAYER AND IN A BARRIER LAYER [patent_app_type] => utility [patent_app_number] => 18/359991 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359991
SEMICONDUCTOR DEVICE HAVING A DOPED REGION UNDERLYING A GATE LAYER AND IN A BARRIER LAYER Jul 26, 2023 Pending
Array ( [id] => 18774566 [patent_doc_number] => 20230369397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => METHOD OF MANUFACTURING A FIELD EFFECT TRANSISTOR USING CARBON NANOTUBES AND A FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/226192 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226192 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226192
Method of manufacturing a field effect transistor using carbon nanotubes and a field effect transistor Jul 24, 2023 Issued
Array ( [id] => 18906189 [patent_doc_number] => 20240021674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => TRANSISTORS FOR RADIO-FREQUENCY CIRCUITS AND DEVICES [patent_app_type] => utility [patent_app_number] => 18/353478 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353478
Transistors for radio-frequency circuits and devices Jul 16, 2023 Issued
Array ( [id] => 19688282 [patent_doc_number] => 20250006827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/342910 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342910 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342910
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME Jun 27, 2023 Pending
Array ( [id] => 18714792 [patent_doc_number] => 20230337437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MEMORY ARRAY SOURCE/DRAIN ELECTRODE STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/341116 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341116 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341116
Memory array source/drain electrode structures Jun 25, 2023 Issued
Array ( [id] => 18866110 [patent_doc_number] => 20230420547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => VERTICAL GALLIUM NITRIDE BASED FETS WITH REGROWN SOURCE CONTACTS [patent_app_type] => utility [patent_app_number] => 18/213707 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15837 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213707
VERTICAL GALLIUM NITRIDE BASED FETS WITH REGROWN SOURCE CONTACTS Jun 22, 2023 Abandoned
Array ( [id] => 18849121 [patent_doc_number] => 20230411525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => METHOD AND SYSTEM FOR FABRICATION OF A VERTICAL FIN-BASED FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/213781 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213781
Method and system for fabrication of a vertical fin-based field effect transistor Jun 22, 2023 Issued
Array ( [id] => 19662245 [patent_doc_number] => 20240429310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => ELECTROSTATIC DISCHARGE CIRCUITRY FOR A HIGH-VOLTAGE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/338808 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338808 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338808
ELECTROSTATIC DISCHARGE CIRCUITRY FOR A HIGH-VOLTAGE SEMICONDUCTOR DEVICE Jun 20, 2023 Pending
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