
Natalie K. Walford
Examiner (ID: 11334)
| Most Active Art Unit | 2879 |
| Art Unit(s) | 2879 |
| Total Applications | 668 |
| Issued Applications | 464 |
| Pending Applications | 1 |
| Abandoned Applications | 210 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18121619
[patent_doc_number] => 11553023
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-10
[patent_title] => Abstraction layer for streaming data sources
[patent_app_type] => utility
[patent_app_number] => 17/180818
[patent_app_country] => US
[patent_app_date] => 2021-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5503
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17180818
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/180818 | Abstraction layer for streaming data sources | Feb 20, 2021 | Issued |
Array
(
[id] => 18343920
[patent_doc_number] => 11641407
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-02
[patent_title] => Methods and systems for implementing communications between a management controller and a network controller via an NC-SI that utilizes IP connectivity
[patent_app_type] => utility
[patent_app_number] => 17/179306
[patent_app_country] => US
[patent_app_date] => 2021-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 8697
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17179306
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/179306 | Methods and systems for implementing communications between a management controller and a network controller via an NC-SI that utilizes IP connectivity | Feb 17, 2021 | Issued |
Array
(
[id] => 17055748
[patent_doc_number] => 20210265182
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-26
[patent_title] => HYBRID PANEL METHOD OF MANUFACTURING ELECTRONIC DEVICES AND ELECTRONIC DEVICES MANUFACTURED THEREBY
[patent_app_type] => utility
[patent_app_number] => 17/176039
[patent_app_country] => US
[patent_app_date] => 2021-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20057
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17176039
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/176039 | Hybrid panel method of manufacturing electronic devices and electronic devices manufactured thereby | Feb 14, 2021 | Issued |
Array
(
[id] => 18230115
[patent_doc_number] => 20230069109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => METAL OXIDE, METHOD FOR FORMING METAL OXIDE, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/797189
[patent_app_country] => US
[patent_app_date] => 2021-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 63124
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17797189
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/797189 | Metal oxide, method for forming metal oxide, and semiconductor device | Feb 8, 2021 | Issued |
Array
(
[id] => 18361286
[patent_doc_number] => 20230142877
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/920484
[patent_app_country] => US
[patent_app_date] => 2021-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10429
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17920484
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/920484 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Feb 7, 2021 | Pending |
Array
(
[id] => 17010873
[patent_doc_number] => 20210242034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => SINTERING METHOD USING A SACRIFICIAL LAYER ON THE BACKSIDE METALLIZATION OF A SEMICONDUCTOR DIE
[patent_app_type] => utility
[patent_app_number] => 17/167620
[patent_app_country] => US
[patent_app_date] => 2021-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5110
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167620
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/167620 | Sintering method using a sacrificial layer on the backside metallization of a semiconductor die | Feb 3, 2021 | Issued |
Array
(
[id] => 18292511
[patent_doc_number] => 11621384
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-04
[patent_title] => Light-emitting device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/165886
[patent_app_country] => US
[patent_app_date] => 2021-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 28
[patent_no_of_words] => 9977
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165886
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/165886 | Light-emitting device and manufacturing method thereof | Feb 1, 2021 | Issued |
Array
(
[id] => 18248956
[patent_doc_number] => 11605552
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-14
[patent_title] => Hybrid panel method of manufacturing electronic devices and electronic devices manufactured thereby
[patent_app_type] => utility
[patent_app_number] => 17/165303
[patent_app_country] => US
[patent_app_date] => 2021-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 28
[patent_no_of_words] => 15977
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165303
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/165303 | Hybrid panel method of manufacturing electronic devices and electronic devices manufactured thereby | Feb 1, 2021 | Issued |
Array
(
[id] => 17040620
[patent_doc_number] => 20210257256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-19
[patent_title] => WAFER PROCESSING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/163836
[patent_app_country] => US
[patent_app_date] => 2021-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163836
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/163836 | Wafer processing method | Jan 31, 2021 | Issued |
Array
(
[id] => 18371792
[patent_doc_number] => 11651974
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-16
[patent_title] => Semiconductor package and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/161818
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 27
[patent_no_of_words] => 2937
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161818
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/161818 | Semiconductor package and method of fabricating the same | Jan 28, 2021 | Issued |
Array
(
[id] => 17318851
[patent_doc_number] => 20210407901
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-30
[patent_title] => METHOD FOR LOW-COST, HIGH-BANDWIDTH MONOLITHIC SYSTEM INTEGRATION BEYOND RETICLE LIMIT
[patent_app_type] => utility
[patent_app_number] => 17/163080
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163080
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/163080 | Method for low-cost, high-bandwidth monolithic system integration beyond reticle limit | Jan 28, 2021 | Issued |
Array
(
[id] => 17138468
[patent_doc_number] => 11140044
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-10-05
[patent_title] => Utilizing models for concurrently discovering network resources of a network
[patent_app_type] => utility
[patent_app_number] => 17/248511
[patent_app_country] => US
[patent_app_date] => 2021-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8436
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248511
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/248511 | Utilizing models for concurrently discovering network resources of a network | Jan 27, 2021 | Issued |
Array
(
[id] => 16981471
[patent_doc_number] => 20210225708
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-22
[patent_title] => Chip Package Based On Through-Silicon-Via Connector And Silicon Interconnection Bridge
[patent_app_type] => utility
[patent_app_number] => 17/155069
[patent_app_country] => US
[patent_app_date] => 2021-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 59333
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155069
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/155069 | Chip package based on through-silicon-via connector and silicon interconnection bridge | Jan 20, 2021 | Issued |
Array
(
[id] => 17938015
[patent_doc_number] => 11472455
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-18
[patent_title] => System and method for network communication within a hyperloop bogie during a critical period of time
[patent_app_type] => utility
[patent_app_number] => 17/151118
[patent_app_country] => US
[patent_app_date] => 2021-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8076
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151118
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/151118 | System and method for network communication within a hyperloop bogie during a critical period of time | Jan 15, 2021 | Issued |
Array
(
[id] => 17624076
[patent_doc_number] => 11343146
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-05-24
[patent_title] => Automatically determining configuration-based issue resolutions across multiple devices using machine learning models
[patent_app_type] => utility
[patent_app_number] => 17/148738
[patent_app_country] => US
[patent_app_date] => 2021-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 8371
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17148738
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/148738 | Automatically determining configuration-based issue resolutions across multiple devices using machine learning models | Jan 13, 2021 | Issued |
Array
(
[id] => 17708563
[patent_doc_number] => 20220208571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => HYPERBARIC SAW FOR SAWING PACKAGED DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/139072
[patent_app_country] => US
[patent_app_date] => 2020-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4832
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139072
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/139072 | Hyperbaric saw for sawing packaged devices | Dec 30, 2020 | Issued |
Array
(
[id] => 16783216
[patent_doc_number] => 20210120295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => CUSTOMIZED OPTIONS FOR CONSUMPTION OF CONTENT
[patent_app_type] => utility
[patent_app_number] => 17/137735
[patent_app_country] => US
[patent_app_date] => 2020-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14205
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137735
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/137735 | Customized options for consumption of content | Dec 29, 2020 | Issued |
Array
(
[id] => 17708601
[patent_doc_number] => 20220208609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => SYSTEMS AND METHODS FOR MITIGATING CRACK PROPAGATION IN SEMICONDUCTOR DIE MANUFACTURING
[patent_app_type] => utility
[patent_app_number] => 17/137135
[patent_app_country] => US
[patent_app_date] => 2020-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5530
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137135
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/137135 | Systems and methods for mitigating crack propagation in semiconductor die manufacturing | Dec 28, 2020 | Issued |
Array
(
[id] => 17825780
[patent_doc_number] => 11430734
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Methods of forming memory devices including stair step structures
[patent_app_type] => utility
[patent_app_number] => 17/134930
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 7540
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134930
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/134930 | Methods of forming memory devices including stair step structures | Dec 27, 2020 | Issued |
Array
(
[id] => 18331862
[patent_doc_number] => 11637119
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-25
[patent_title] => Three-dimensional memory device containing auxiliary support pillar structures and method of making the same
[patent_app_type] => utility
[patent_app_number] => 17/134938
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 102
[patent_figures_cnt] => 119
[patent_no_of_words] => 31370
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134938
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/134938 | Three-dimensional memory device containing auxiliary support pillar structures and method of making the same | Dec 27, 2020 | Issued |