Search

Natasha Patel

Examiner (ID: 2431)

Most Active Art Unit
3766
Art Unit(s)
3766, 3762, 3792
Total Applications
959
Issued Applications
737
Pending Applications
72
Abandoned Applications
174

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 767915 [patent_doc_number] => 07009617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'On-screen display device' [patent_app_type] => utility [patent_app_number] => 10/814191 [patent_app_country] => US [patent_app_date] => 2004-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5942 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009617.pdf [firstpage_image] =>[orig_patent_app_number] => 10814191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/814191
On-screen display device Mar 31, 2004 Issued
Array ( [id] => 7425324 [patent_doc_number] => 20040183804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'METHOD FOR A DISPLAY CONTROLLER TO ACCESS DATA STORED IN A SYSTEM MEMORY OF A COMPUTER DEVICE' [patent_app_type] => new [patent_app_number] => 10/708662 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183804.pdf [firstpage_image] =>[orig_patent_app_number] => 10708662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/708662
Method for a graphics chip to access data stored in a system memory of a computer device Mar 17, 2004 Issued
Array ( [id] => 731661 [patent_doc_number] => 07042461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Window idle frame memory compression' [patent_app_type] => utility [patent_app_number] => 10/800182 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3825 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042461.pdf [firstpage_image] =>[orig_patent_app_number] => 10800182 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/800182
Window idle frame memory compression Mar 10, 2004 Issued
Array ( [id] => 973351 [patent_doc_number] => 06937242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => '3-D graphics chip with embedded DRAM buffers' [patent_app_type] => utility [patent_app_number] => 10/796541 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4792 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937242.pdf [firstpage_image] =>[orig_patent_app_number] => 10796541 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796541
3-D graphics chip with embedded DRAM buffers Mar 7, 2004 Issued
Array ( [id] => 969332 [patent_doc_number] => 06940513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Data aware clustered architecture for an image generator' [patent_app_type] => utility [patent_app_number] => 10/795725 [patent_app_country] => US [patent_app_date] => 2004-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9432 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940513.pdf [firstpage_image] =>[orig_patent_app_number] => 10795725 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795725
Data aware clustered architecture for an image generator Mar 4, 2004 Issued
Array ( [id] => 7178596 [patent_doc_number] => 20050190195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Register based queuing for texture requests' [patent_app_type] => utility [patent_app_number] => 10/789735 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4695 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20050190195.pdf [firstpage_image] =>[orig_patent_app_number] => 10789735 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789735
Register based queuing for texture requests Feb 26, 2004 Issued
Array ( [id] => 7418765 [patent_doc_number] => 20040160448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Accelerated graphics port for a multiple memory controller computer system' [patent_app_type] => new [patent_app_number] => 10/776439 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4524 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160448.pdf [firstpage_image] =>[orig_patent_app_number] => 10776439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776439
Accelerated graphics port for a multiple memory controller computer system Feb 9, 2004 Issued
Array ( [id] => 931709 [patent_doc_number] => 06980216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Graphics driver and method with time partitioning' [patent_app_type] => utility [patent_app_number] => 10/766546 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7729 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/980/06980216.pdf [firstpage_image] =>[orig_patent_app_number] => 10766546 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766546
Graphics driver and method with time partitioning Jan 26, 2004 Issued
Array ( [id] => 935975 [patent_doc_number] => 06975325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Method and apparatus for graphics processing using state and shader management' [patent_app_type] => utility [patent_app_number] => 10/763782 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2528 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975325.pdf [firstpage_image] =>[orig_patent_app_number] => 10763782 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/763782
Method and apparatus for graphics processing using state and shader management Jan 22, 2004 Issued
Array ( [id] => 986165 [patent_doc_number] => 06924809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Method and buffer device for data stream transformation' [patent_app_type] => utility [patent_app_number] => 10/758746 [patent_app_country] => US [patent_app_date] => 2004-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4141 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924809.pdf [firstpage_image] =>[orig_patent_app_number] => 10758746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/758746
Method and buffer device for data stream transformation Jan 12, 2004 Issued
Array ( [id] => 553840 [patent_doc_number] => 07170564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-30 [patent_title] => 'On-screen display device' [patent_app_type] => utility [patent_app_number] => 10/752509 [patent_app_country] => US [patent_app_date] => 2004-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5501 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/170/07170564.pdf [firstpage_image] =>[orig_patent_app_number] => 10752509 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752509
On-screen display device Jan 7, 2004 Issued
Array ( [id] => 791125 [patent_doc_number] => 06985151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-10 [patent_title] => 'Shader pixel storage in a graphics memory' [patent_app_type] => utility [patent_app_number] => 10/752783 [patent_app_country] => US [patent_app_date] => 2004-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985151.pdf [firstpage_image] =>[orig_patent_app_number] => 10752783 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/752783
Shader pixel storage in a graphics memory Jan 5, 2004 Issued
Array ( [id] => 7418781 [patent_doc_number] => 20040160449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Video memory management' [patent_app_type] => new [patent_app_number] => 10/748362 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14342 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160449.pdf [firstpage_image] =>[orig_patent_app_number] => 10748362 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748362
Video memory management Dec 29, 2003 Issued
Array ( [id] => 7609101 [patent_doc_number] => 06999088 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-14 [patent_title] => 'Memory system having multiple subpartitions' [patent_app_type] => utility [patent_app_number] => 10/746320 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5579 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/999/06999088.pdf [firstpage_image] =>[orig_patent_app_number] => 10746320 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/746320
Memory system having multiple subpartitions Dec 22, 2003 Issued
Array ( [id] => 784059 [patent_doc_number] => 06992679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Hardware display rotation' [patent_app_type] => utility [patent_app_number] => 10/744534 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3316 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992679.pdf [firstpage_image] =>[orig_patent_app_number] => 10744534 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/744534
Hardware display rotation Dec 21, 2003 Issued
Array ( [id] => 718086 [patent_doc_number] => 07053901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'System and method for accelerating a special purpose processor' [patent_app_type] => utility [patent_app_number] => 10/732445 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3922 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053901.pdf [firstpage_image] =>[orig_patent_app_number] => 10732445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732445
System and method for accelerating a special purpose processor Dec 10, 2003 Issued
Array ( [id] => 701152 [patent_doc_number] => 07068278 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-27 [patent_title] => 'Synchronized graphics processing units' [patent_app_type] => utility [patent_app_number] => 10/732944 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 34 [patent_no_of_words] => 10980 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/068/07068278.pdf [firstpage_image] =>[orig_patent_app_number] => 10732944 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732944
Synchronized graphics processing units Dec 10, 2003 Issued
Array ( [id] => 731663 [patent_doc_number] => 07042462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Pixel cache, 3D graphics accelerator using the same, and method therefor' [patent_app_type] => utility [patent_app_number] => 10/731434 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3476 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042462.pdf [firstpage_image] =>[orig_patent_app_number] => 10731434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731434
Pixel cache, 3D graphics accelerator using the same, and method therefor Dec 9, 2003 Issued
Array ( [id] => 7612093 [patent_doc_number] => 06903745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Image processing apparatus and image processing method' [patent_app_type] => utility [patent_app_number] => 10/731103 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3261 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903745.pdf [firstpage_image] =>[orig_patent_app_number] => 10731103 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/731103
Image processing apparatus and image processing method Dec 9, 2003 Issued
Array ( [id] => 7095748 [patent_doc_number] => 20050128206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'METHOD AND APPARATUS FOR REDUCING FRAME BUFFER SIZE IN GRAPHICS SYSTEMS' [patent_app_type] => utility [patent_app_number] => 10/732083 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3148 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128206.pdf [firstpage_image] =>[orig_patent_app_number] => 10732083 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/732083
Method and apparatus for reducing frame buffer size in graphics systems Dec 9, 2003 Issued
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