Search

Natasha W Cosme

Examiner (ID: 4117, Phone: (571)270-7225 , Office: P/2465 )

Most Active Art Unit
2465
Art Unit(s)
2465, 2645, 2641, 2617
Total Applications
659
Issued Applications
486
Pending Applications
57
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7653068 [patent_doc_number] => 20110302337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'PATH SELECTION FOR APPLICATION COMMANDS' [patent_app_type] => utility [patent_app_number] => 12/794594 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6616 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302337.pdf [firstpage_image] =>[orig_patent_app_number] => 12794594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/794594
Path selection for application commands Jun 3, 2010 Issued
Array ( [id] => 7694904 [patent_doc_number] => 20110231686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'MANAGEMENT APPARATUS AND MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 12/788754 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 19068 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231686.pdf [firstpage_image] =>[orig_patent_app_number] => 12788754 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788754
MANAGEMENT APPARATUS AND MANAGEMENT METHOD May 26, 2010 Abandoned
Array ( [id] => 7582551 [patent_doc_number] => 20110296434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'Techniques for Dynamically Sharing a Fabric to Facilitate Off-Chip Communication for Multiple On-Chip Units' [patent_app_type] => utility [patent_app_number] => 12/786716 [patent_app_country] => US [patent_app_date] => 2010-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4598 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296434.pdf [firstpage_image] =>[orig_patent_app_number] => 12786716 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/786716
Techniques for dynamically sharing a fabric to facilitate off-chip communication for multiple on-chip units May 24, 2010 Issued
Array ( [id] => 8235412 [patent_doc_number] => 08200871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Systems and methods for scalable distributed storage processing' [patent_app_type] => utility [patent_app_number] => 12/779681 [patent_app_country] => US [patent_app_date] => 2010-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 32 [patent_no_of_words] => 16665 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200871.pdf [firstpage_image] =>[orig_patent_app_number] => 12779681 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/779681
Systems and methods for scalable distributed storage processing May 12, 2010 Issued
Array ( [id] => 6412031 [patent_doc_number] => 20100306293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Galois Field Multiplier' [patent_app_type] => utility [patent_app_number] => 12/778378 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4651 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20100306293.pdf [firstpage_image] =>[orig_patent_app_number] => 12778378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778378
Galois Field Multiplier May 11, 2010 Abandoned
Array ( [id] => 8388920 [patent_doc_number] => 08266333 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-09-11 [patent_title] => 'System and method for parallel image processing and routing' [patent_app_type] => utility [patent_app_number] => 12/776048 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 10510 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776048 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/776048
System and method for parallel image processing and routing May 6, 2010 Issued
Array ( [id] => 7560390 [patent_doc_number] => 20110274222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'DIGITAL FREQUENCY CHANNELIZER' [patent_app_type] => utility [patent_app_number] => 12/773790 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3220 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20110274222.pdf [firstpage_image] =>[orig_patent_app_number] => 12773790 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/773790
Digital frequency channelizer May 3, 2010 Issued
Array ( [id] => 8799317 [patent_doc_number] => 08438201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Digital fractional integrator' [patent_app_type] => utility [patent_app_number] => 12/772074 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2312 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12772074 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/772074
Digital fractional integrator Apr 29, 2010 Issued
Array ( [id] => 8273035 [patent_doc_number] => 08214557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Measuring direct memory access throughput' [patent_app_type] => utility [patent_app_number] => 12/766923 [patent_app_country] => US [patent_app_date] => 2010-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2721 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12766923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/766923
Measuring direct memory access throughput Apr 25, 2010 Issued
Array ( [id] => 8752000 [patent_doc_number] => 08417843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Electronic device and data control method thereof' [patent_app_type] => utility [patent_app_number] => 12/763867 [patent_app_country] => US [patent_app_date] => 2010-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4287 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12763867 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/763867
Electronic device and data control method thereof Apr 19, 2010 Issued
Array ( [id] => 8574653 [patent_doc_number] => 08341314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Managing I/O request in storage system' [patent_app_type] => utility [patent_app_number] => 12/731153 [patent_app_country] => US [patent_app_date] => 2010-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12731153 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/731153
Managing I/O request in storage system Mar 24, 2010 Issued
Array ( [id] => 8861415 [patent_doc_number] => 08463967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-11 [patent_title] => 'Method and device for scheduling queues based on chained list' [patent_app_type] => utility [patent_app_number] => 13/258936 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4016 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13258936 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/258936
Method and device for scheduling queues based on chained list Mar 23, 2010 Issued
Array ( [id] => 9348026 [patent_doc_number] => 08667188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Communication between a computer and a data storage device' [patent_app_type] => utility [patent_app_number] => 13/386258 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2901 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13386258 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/386258
Communication between a computer and a data storage device Mar 23, 2010 Issued
Array ( [id] => 7492830 [patent_doc_number] => 20110238866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'VARIABLE READ LATENCY ON A SERIAL MEMORY BUS' [patent_app_type] => utility [patent_app_number] => 12/729905 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4797 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20110238866.pdf [firstpage_image] =>[orig_patent_app_number] => 12729905 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/729905
Variable read latency on a serial memory bus Mar 22, 2010 Issued
Array ( [id] => 8923715 [patent_doc_number] => 08489662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Systems and methods for sliding convolution interpolating filters' [patent_app_type] => utility [patent_app_number] => 12/718099 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718099 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718099
Systems and methods for sliding convolution interpolating filters Mar 4, 2010 Issued
Array ( [id] => 4606315 [patent_doc_number] => 07987301 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-26 [patent_title] => 'DMA controller executing multiple transactions at non-contiguous system locations' [patent_app_type] => utility [patent_app_number] => 12/717587 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4676 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/987/07987301.pdf [firstpage_image] =>[orig_patent_app_number] => 12717587 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717587
DMA controller executing multiple transactions at non-contiguous system locations Mar 3, 2010 Issued
Array ( [id] => 8912189 [patent_doc_number] => 08484265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-09 [patent_title] => 'Angular range reduction in an integrated circuit device' [patent_app_type] => utility [patent_app_number] => 12/717212 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3400 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12717212 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717212
Angular range reduction in an integrated circuit device Mar 3, 2010 Issued
Array ( [id] => 6582262 [patent_doc_number] => 20100235417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'CIRCUIT AND METHOD CONVERTING BOOLEAN AND ARITHMETIC MASKS' [patent_app_type] => utility [patent_app_number] => 12/717249 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20100235417.pdf [firstpage_image] =>[orig_patent_app_number] => 12717249 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717249
Circuit and method converting boolean and arithmetic masks Mar 3, 2010 Issued
Array ( [id] => 6650925 [patent_doc_number] => 20100228806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'MODULAR DIGITAL SIGNAL PROCESSING CIRCUITRY WITH OPTIONALLY USABLE, DEDICATED CONNECTIONS BETWEEN MODULES OF THE CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 12/716878 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 24766 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20100228806.pdf [firstpage_image] =>[orig_patent_app_number] => 12716878 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/716878
Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry Mar 2, 2010 Issued
Array ( [id] => 8849044 [patent_doc_number] => 08458243 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-04 [patent_title] => 'Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering' [patent_app_type] => utility [patent_app_number] => 12/716378 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 9812 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12716378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/716378
Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering Mar 2, 2010 Issued
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