Search

Natasha W Cosme

Examiner (ID: 3644, Phone: (571)270-7225 , Office: P/2465 )

Most Active Art Unit
2465
Art Unit(s)
2617, 2645, 2641, 2465
Total Applications
655
Issued Applications
483
Pending Applications
56
Abandoned Applications
116

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8227548 [patent_doc_number] => 20120141748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'Template-Registered DiBlock Copolymer Mask for MRAM Device Formation' [patent_app_type] => utility [patent_app_number] => 13/396998 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2518 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13396998 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/396998
Template-registered diblock copolymer mask for MRAM device formation Feb 14, 2012 Issued
Array ( [id] => 8347409 [patent_doc_number] => 20120208324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/372406 [patent_app_country] => US [patent_app_date] => 2012-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13372406 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/372406
Manufacturing method of semiconductor device Feb 12, 2012 Issued
Array ( [id] => 8976748 [patent_doc_number] => 20130210178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/371670 [patent_app_country] => US [patent_app_date] => 2012-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3420 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371670 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/371670
Light-emitting device manufacturing method Feb 12, 2012 Issued
Array ( [id] => 8417221 [patent_doc_number] => 20120244722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'SELECTIVE CRYSTALLIZATION METHOD AND LASER CRYSTALLIZATION APPARATUS USED IN THE SELECTIVE CRYSTALLIZATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/371105 [patent_app_country] => US [patent_app_date] => 2012-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6310 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371105 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/371105
Selective crystallization method and laser crystallization apparatus used in the selective crystallization method Feb 9, 2012 Issued
Array ( [id] => 8976758 [patent_doc_number] => 20130210188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'Method and Apparatus for Reducing Stripe Patterns' [patent_app_type] => utility [patent_app_number] => 13/371303 [patent_app_country] => US [patent_app_date] => 2012-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13371303 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/371303
Method and apparatus for reducing stripe patterns Feb 9, 2012 Issued
Array ( [id] => 8976802 [patent_doc_number] => 20130210232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'CUT-MASK PATTERNING PROCESS FOR FIN-LIKE FIELD EFFECT TRANSISTOR (FINFET) DEVICE' [patent_app_type] => utility [patent_app_number] => 13/369818 [patent_app_country] => US [patent_app_date] => 2012-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369818 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/369818
Cut-mask patterning process for fin-like field effect transistor (FinFET) device Feb 8, 2012 Issued
Array ( [id] => 8217378 [patent_doc_number] => 20120133022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'METHODS OF FABRICATING PASSIVE ELEMENT WITHOUT PLANARIZING AND RELATED SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/359634 [patent_app_country] => US [patent_app_date] => 2012-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2772 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13359634 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359634
Methods of fabricating passive element without planarizing and related semiconductor device Jan 26, 2012 Issued
Array ( [id] => 8127575 [patent_doc_number] => 20120088338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'INTEGRATED CIRCUIT TAMPERING PROTECTION AND REVERSE ENGINEERING PREVENTION COATINGS AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/329068 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3898 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20120088338.pdf [firstpage_image] =>[orig_patent_app_number] => 13329068 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329068
Integrated circuit tampering protection and reverse engineering prevention coatings and methods Dec 15, 2011 Issued
Array ( [id] => 9524017 [patent_doc_number] => 08748280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Methods of fabricating fin structures' [patent_app_type] => utility [patent_app_number] => 13/324520 [patent_app_country] => US [patent_app_date] => 2011-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4754 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324520 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/324520
Methods of fabricating fin structures Dec 12, 2011 Issued
Array ( [id] => 8749889 [patent_doc_number] => 08415722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Memory devices and memory cells' [patent_app_type] => utility [patent_app_number] => 13/301921 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6710 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301921 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301921
Memory devices and memory cells Nov 21, 2011 Issued
Array ( [id] => 7818065 [patent_doc_number] => 20120064685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Methods of making random access memory devices, transistors, and memory cells' [patent_app_type] => utility [patent_app_number] => 13/301916 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6613 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064685.pdf [firstpage_image] =>[orig_patent_app_number] => 13301916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301916
Methods of making random access memory devices, transistors, and memory cells Nov 21, 2011 Issued
Array ( [id] => 9888912 [patent_doc_number] => 08975166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Method and apparatus for atomic hydrogen surface treatment during GaN epitaxy' [patent_app_type] => utility [patent_app_number] => 13/302001 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10422 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13302001 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/302001
Method and apparatus for atomic hydrogen surface treatment during GaN epitaxy Nov 21, 2011 Issued
Array ( [id] => 9850131 [patent_doc_number] => 08951859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Method for fabricating passive devices for 3D non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/301560 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 54 [patent_no_of_words] => 21402 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301560 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301560
Method for fabricating passive devices for 3D non-volatile memory Nov 20, 2011 Issued
Array ( [id] => 8829451 [patent_doc_number] => 20130130495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'Method For Fabricating A Metal Silicide Interconnect In 3D Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 13/301583 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 21726 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301583 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/301583
Method for fabricating a metal silicide interconnect in 3D non-volatile memory Nov 20, 2011 Issued
Array ( [id] => 10047399 [patent_doc_number] => 09087803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Methods of testing integrated circuit devices using fuse elements' [patent_app_type] => utility [patent_app_number] => 13/300274 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 5396 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13300274 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/300274
Methods of testing integrated circuit devices using fuse elements Nov 17, 2011 Issued
Array ( [id] => 9869209 [patent_doc_number] => 08956982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/300262 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5339 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13300262 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/300262
Manufacturing method of semiconductor device Nov 17, 2011 Issued
Array ( [id] => 8310545 [patent_doc_number] => 20120187567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES' [patent_app_type] => utility [patent_app_number] => 13/298140 [patent_app_country] => US [patent_app_date] => 2011-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6159 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13298140 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/298140
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices Nov 15, 2011 Issued
Array ( [id] => 8909339 [patent_doc_number] => 08481402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Epitaxy silicon on insulator (ESOI)' [patent_app_type] => utility [patent_app_number] => 13/285796 [patent_app_country] => US [patent_app_date] => 2011-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3218 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13285796 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/285796
Epitaxy silicon on insulator (ESOI) Oct 30, 2011 Issued
Array ( [id] => 7743428 [patent_doc_number] => 20120021544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'DISPLAY DEVICE, METHOD FOR MANUFACTURING DISPLAY DEVICE, AND SOI SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/249308 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 21350 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20120021544.pdf [firstpage_image] =>[orig_patent_app_number] => 13249308 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/249308
Display device, method for manufacturing display device, and SOI substrate Sep 29, 2011 Issued
Array ( [id] => 9140206 [patent_doc_number] => 08580666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Methods of forming conductive contacts' [patent_app_type] => utility [patent_app_number] => 13/246146 [patent_app_country] => US [patent_app_date] => 2011-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5609 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13246146 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/246146
Methods of forming conductive contacts Sep 26, 2011 Issued
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