Search

Nathan C. Uber

Supervisory Patent Examiner (ID: 17840, Phone: (571)270-3923 , Office: P/3622 )

Most Active Art Unit
3622
Art Unit(s)
3626, 3687, 3622
Total Applications
263
Issued Applications
10
Pending Applications
9
Abandoned Applications
241

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17508021 [patent_doc_number] => 20220101124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/368890 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368890
NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING METHOD Jul 6, 2021 Abandoned
Array ( [id] => 17205038 [patent_doc_number] => 20210345133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => METHOD AND DEVICE FOR CONFIGURING NETWORK PARAMETER, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/284210 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17284210 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/284210
METHOD AND DEVICE FOR CONFIGURING NETWORK PARAMETER, AND COMPUTER-READABLE STORAGE MEDIUM Oct 23, 2018 Abandoned
Array ( [id] => 7047112 [patent_doc_number] => 20050251707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Mothod and apparatus for implementing assertions in hardware' [patent_app_type] => utility [patent_app_number] => 10/835485 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12810 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20050251707.pdf [firstpage_image] =>[orig_patent_app_number] => 10835485 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835485
Method and apparatus for implementing assertions in hardware Apr 28, 2004 Issued
Array ( [id] => 7255666 [patent_doc_number] => 20050273654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Minimizing resynchronization time after backup system failures in an appliance-based business continuance architecture' [patent_app_type] => utility [patent_app_number] => 10/834502 [patent_app_country] => US [patent_app_date] => 2004-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9446 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20050273654.pdf [firstpage_image] =>[orig_patent_app_number] => 10834502 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834502
Minimizing resynchronization time after backup system failures in an appliance-based business continuance architecture Apr 27, 2004 Issued
Array ( [id] => 7333536 [patent_doc_number] => 20040255192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Information processing apparatus and network connection diagnostic method used in the same apparatus' [patent_app_type] => new [patent_app_number] => 10/765142 [patent_app_country] => US [patent_app_date] => 2004-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4713 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255192.pdf [firstpage_image] =>[orig_patent_app_number] => 10765142 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765142
Information processing apparatus and network connection diagnostic method used in the same apparatus Jan 27, 2004 Abandoned
Array ( [id] => 435055 [patent_doc_number] => 07266717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'System and method of selection and communication of a disk for storage of a coredump' [patent_app_type] => utility [patent_app_number] => 10/764773 [patent_app_country] => US [patent_app_date] => 2004-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8754 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/266/07266717.pdf [firstpage_image] =>[orig_patent_app_number] => 10764773 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/764773
System and method of selection and communication of a disk for storage of a coredump Jan 25, 2004 Issued
Array ( [id] => 7676047 [patent_doc_number] => 20040153780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Method and device for the correction of the dynamic error of a sensor' [patent_app_type] => new [patent_app_number] => 10/481561 [patent_app_country] => US [patent_app_date] => 2003-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2621 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153780.pdf [firstpage_image] =>[orig_patent_app_number] => 10481561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/481561
Method and device for the correction of the dynamic error of a sensor Dec 18, 2003 Abandoned
Array ( [id] => 513537 [patent_doc_number] => 07206966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Fault-tolerant multi-core microprocessing' [patent_app_type] => utility [patent_app_number] => 10/690727 [patent_app_country] => US [patent_app_date] => 2003-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3795 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206966.pdf [firstpage_image] =>[orig_patent_app_number] => 10690727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690727
Fault-tolerant multi-core microprocessing Oct 21, 2003 Issued
Array ( [id] => 466117 [patent_doc_number] => 07243265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-10 [patent_title] => 'Nearest neighbor approach for improved training of real-time health monitors for data processing systems' [patent_app_type] => utility [patent_app_number] => 10/690917 [patent_app_country] => US [patent_app_date] => 2003-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5762 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/243/07243265.pdf [firstpage_image] =>[orig_patent_app_number] => 10690917 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690917
Nearest neighbor approach for improved training of real-time health monitors for data processing systems Oct 21, 2003 Issued
Array ( [id] => 7675994 [patent_doc_number] => 20040153833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Fault tracing in systems with virtualization layers' [patent_app_type] => new [patent_app_number] => 10/689190 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2417 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20040153833.pdf [firstpage_image] =>[orig_patent_app_number] => 10689190 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/689190
Fault tracing in systems with virtualization layers Oct 19, 2003 Issued
Array ( [id] => 554808 [patent_doc_number] => 07181643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Method for comparing the address of a memory access with an already known address of a faulty memory cell' [patent_app_type] => utility [patent_app_number] => 10/689422 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1780 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/181/07181643.pdf [firstpage_image] =>[orig_patent_app_number] => 10689422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/689422
Method for comparing the address of a memory access with an already known address of a faulty memory cell Oct 19, 2003 Issued
Array ( [id] => 7352327 [patent_doc_number] => 20040193735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method and circuit arrangement for synchronization of synchronously or asynchronously clocked processor units' [patent_app_type] => new [patent_app_number] => 10/659701 [patent_app_country] => US [patent_app_date] => 2003-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6835 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20040193735.pdf [firstpage_image] =>[orig_patent_app_number] => 10659701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659701
Method and circuit arrangement for synchronization of synchronously or asynchronously clocked processor units Sep 10, 2003 Abandoned
Array ( [id] => 504152 [patent_doc_number] => 07213170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Opportunistic CPU functional testing with hardware compare' [patent_app_type] => utility [patent_app_number] => 10/659079 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3833 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/213/07213170.pdf [firstpage_image] =>[orig_patent_app_number] => 10659079 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659079
Opportunistic CPU functional testing with hardware compare Sep 9, 2003 Issued
Array ( [id] => 554333 [patent_doc_number] => 07174479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-06 [patent_title] => 'Method and system for rollback-free failure recovery of multi-step procedures' [patent_app_type] => utility [patent_app_number] => 10/659453 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5126 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/174/07174479.pdf [firstpage_image] =>[orig_patent_app_number] => 10659453 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659453
Method and system for rollback-free failure recovery of multi-step procedures Sep 9, 2003 Issued
Array ( [id] => 7223677 [patent_doc_number] => 20050055674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Opportunistic pattern-based CPU functional testing' [patent_app_type] => utility [patent_app_number] => 10/658981 [patent_app_country] => US [patent_app_date] => 2003-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3605 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20050055674.pdf [firstpage_image] =>[orig_patent_app_number] => 10658981 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658981
Opportunistic pattern-based CPU functional testing Sep 9, 2003 Issued
Array ( [id] => 7223188 [patent_doc_number] => 20050055602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Autonomic recovery of PPRC errors detected by PPRC peer' [patent_app_type] => utility [patent_app_number] => 10/658054 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20050055602.pdf [firstpage_image] =>[orig_patent_app_number] => 10658054 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658054
Autonomic recovery of PPRC errors detected by PPRC peer Sep 7, 2003 Issued
Array ( [id] => 458171 [patent_doc_number] => 07249281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-24 [patent_title] => 'Method and system for backing up and restoring data of a node in a distributed system' [patent_app_type] => utility [patent_app_number] => 10/628806 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4707 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/249/07249281.pdf [firstpage_image] =>[orig_patent_app_number] => 10628806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628806
Method and system for backing up and restoring data of a node in a distributed system Jul 27, 2003 Issued
Array ( [id] => 7282176 [patent_doc_number] => 20040064553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Computer network solution and software product to establish error tolerance in a network environment' [patent_app_type] => new [patent_app_number] => 10/622319 [patent_app_country] => US [patent_app_date] => 2003-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4666 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20040064553.pdf [firstpage_image] =>[orig_patent_app_number] => 10622319 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622319
Computer network solution and software product to establish error tolerance in a network environment Jul 17, 2003 Abandoned
Array ( [id] => 388727 [patent_doc_number] => 07305586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Accessing and manipulating microprocessor state' [patent_app_type] => utility [patent_app_number] => 10/424485 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7783 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/305/07305586.pdf [firstpage_image] =>[orig_patent_app_number] => 10424485 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424485
Accessing and manipulating microprocessor state Apr 24, 2003 Issued
Array ( [id] => 564235 [patent_doc_number] => 07168002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Preservation of error data on a diskless platform' [patent_app_type] => utility [patent_app_number] => 10/424199 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4497 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/168/07168002.pdf [firstpage_image] =>[orig_patent_app_number] => 10424199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/424199
Preservation of error data on a diskless platform Apr 24, 2003 Issued
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