Search

Nathan J. Milakovich

Examiner (ID: 7996, Phone: (571)270-3087 , Office: P/2848 )

Most Active Art Unit
2848
Art Unit(s)
2835, 2848, 2847, 4134
Total Applications
941
Issued Applications
717
Pending Applications
73
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9796456 [patent_doc_number] => 20150008400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY DEVICES AND METHODS OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/267782 [patent_app_country] => US [patent_app_date] => 2014-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10484 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14267782 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/267782
ORGANIC LIGHT EMITTING DISPLAY DEVICES AND METHODS OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICES Apr 30, 2014 Abandoned
Array ( [id] => 10923946 [patent_doc_number] => 20140326967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-06 [patent_title] => 'OLED TOUCH DISPLAY PANEL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/267343 [patent_app_country] => US [patent_app_date] => 2014-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3712 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14267343 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/267343
OLED touch display panel structure Apr 30, 2014 Issued
Array ( [id] => 10923947 [patent_doc_number] => 20140326968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-06 [patent_title] => 'IN-CELL OLED TOUCH DISPLAY PANEL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/267385 [patent_app_country] => US [patent_app_date] => 2014-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2878 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14267385 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/267385
IN-CELL OLED TOUCH DISPLAY PANEL STRUCTURE Apr 30, 2014 Abandoned
Array ( [id] => 10431492 [patent_doc_number] => 20150316503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'Differential Pair Sensing Circuit Structures' [patent_app_type] => utility [patent_app_number] => 14/265622 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14265622 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/265622
Differential pair sensing circuit structures Apr 29, 2014 Issued
Array ( [id] => 10433283 [patent_doc_number] => 20150318295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'VERTICAL FLOATING GATE NAND WITH OFFSET DUAL CONTROL GATES' [patent_app_type] => utility [patent_app_number] => 14/265733 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5059 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14265733 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/265733
VERTICAL FLOATING GATE NAND WITH OFFSET DUAL CONTROL GATES Apr 29, 2014 Abandoned
Array ( [id] => 10433273 [patent_doc_number] => 20150318285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'DRAM INTERCONNECT STRUCTURE HAVING FERROELECTRIC CAPACITORS' [patent_app_type] => utility [patent_app_number] => 14/266384 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266384 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/266384
DRAM interconnect structure having ferroelectric capacitors exhibiting negative capacitance Apr 29, 2014 Issued
Array ( [id] => 10418181 [patent_doc_number] => 20150303191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'PRECISION TRENCH CAPACITOR' [patent_app_type] => utility [patent_app_number] => 14/257143 [patent_app_country] => US [patent_app_date] => 2014-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14257143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/257143
Precision trench capacitor Apr 20, 2014 Issued
Array ( [id] => 11432227 [patent_doc_number] => 09570554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Robust gate spacer for semiconductor devices' [patent_app_type] => utility [patent_app_number] => 14/244945 [patent_app_country] => US [patent_app_date] => 2014-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 5378 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14244945 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/244945
Robust gate spacer for semiconductor devices Apr 3, 2014 Issued
Array ( [id] => 10286230 [patent_doc_number] => 20150171228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'SCHOTTKY BARRIER DIODE' [patent_app_type] => utility [patent_app_number] => 14/244090 [patent_app_country] => US [patent_app_date] => 2014-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3339 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14244090 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/244090
Schottky barrier diode Apr 2, 2014 Issued
Array ( [id] => 10401912 [patent_doc_number] => 20150286921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'CHIP CARD SUBSTRATE AND METHOD OF FORMING A CHIP CARD SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/243946 [patent_app_country] => US [patent_app_date] => 2014-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11241 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243946 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243946
CHIP CARD SUBSTRATE AND METHOD OF FORMING A CHIP CARD SUBSTRATE Apr 2, 2014 Abandoned
Array ( [id] => 11807196 [patent_doc_number] => 09548280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Solder pad for semiconductor device package' [patent_app_type] => utility [patent_app_number] => 14/243649 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5006 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243649 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243649
Solder pad for semiconductor device package Apr 1, 2014 Issued
Array ( [id] => 10402836 [patent_doc_number] => 20150287845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'PID-RESISTANT SOLAR CELL STRUCTURE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/243872 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1457 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243872 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243872
PID-RESISTANT SOLAR CELL STRUCTURE AND FABRICATION METHOD THEREOF Apr 1, 2014 Abandoned
Array ( [id] => 10402720 [patent_doc_number] => 20150287728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'FLOATING BODY STORAGE DEVICE EMPLOYING A CHARGE STORAGE TRENCH' [patent_app_type] => utility [patent_app_number] => 14/243037 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243037 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243037
Floating body storage device employing a charge storage trench Apr 1, 2014 Issued
Array ( [id] => 10402688 [patent_doc_number] => 20150287697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'Semiconductor Device and Method' [patent_app_type] => utility [patent_app_number] => 14/243517 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8634 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243517 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243517
Semiconductor Device and Method Apr 1, 2014 Abandoned
Array ( [id] => 10402731 [patent_doc_number] => 20150287740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'STRAIN ENGINEERING IN BACK END OF THE LINE' [patent_app_type] => utility [patent_app_number] => 14/243385 [patent_app_country] => US [patent_app_date] => 2014-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12957 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14243385 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/243385
Strain engineering in back end of the line Apr 1, 2014 Issued
Array ( [id] => 11432215 [patent_doc_number] => 09570542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Semiconductor device including a vertical edge termination structure and method of manufacturing' [patent_app_type] => utility [patent_app_number] => 14/242366 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 7824 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242366 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242366
Semiconductor device including a vertical edge termination structure and method of manufacturing Mar 31, 2014 Issued
Array ( [id] => 10394896 [patent_doc_number] => 20150279904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'MAGNETIC TUNNEL JUNCTION FOR MRAM DEVICE' [patent_app_type] => utility [patent_app_number] => 14/242419 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3963 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242419 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242419
MAGNETIC TUNNEL JUNCTION FOR MRAM DEVICE Mar 31, 2014 Abandoned
Array ( [id] => 10577131 [patent_doc_number] => 09299781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Semiconductor devices with contact structures and a gate structure positioned in trenches formed in a layer of material' [patent_app_type] => utility [patent_app_number] => 14/242416 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10287 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242416
Semiconductor devices with contact structures and a gate structure positioned in trenches formed in a layer of material Mar 31, 2014 Issued
Array ( [id] => 10394424 [patent_doc_number] => 20150279431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH PARTITIONED LOGIC AND ASSOCIATED SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/242485 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5070 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242485 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242485
STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH PARTITIONED LOGIC AND ASSOCIATED SYSTEMS AND METHODS Mar 31, 2014 Abandoned
Array ( [id] => 10394807 [patent_doc_number] => 20150279814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'EMBEDDED CHIPS' [patent_app_type] => utility [patent_app_number] => 14/242696 [patent_app_country] => US [patent_app_date] => 2014-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7199 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14242696 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/242696
EMBEDDED CHIPS Mar 31, 2014 Abandoned
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