
Nathan K. Kelley
Examiner (ID: 12542)
| Most Active Art Unit | 2503 |
| Art Unit(s) | 2503, 2814 |
| Total Applications | 343 |
| Issued Applications | 248 |
| Pending Applications | 21 |
| Abandoned Applications | 74 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3972645
[patent_doc_number] => 05886397
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Crushable bead on lead finger side surface to improve moldability'
[patent_app_type] => 1
[patent_app_number] => 8/915926
[patent_app_country] => US
[patent_app_date] => 1997-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 24
[patent_no_of_words] => 3293
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/886/05886397.pdf
[firstpage_image] =>[orig_patent_app_number] => 915926
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/915926 | Crushable bead on lead finger side surface to improve moldability | Aug 20, 1997 | Issued |
Array
(
[id] => 3998657
[patent_doc_number] => 05892287
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Semiconductor device including stacked chips having metal patterned on circuit surface and on edge side of chip'
[patent_app_type] => 1
[patent_app_number] => 8/912508
[patent_app_country] => US
[patent_app_date] => 1997-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 25
[patent_no_of_words] => 4025
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/892/05892287.pdf
[firstpage_image] =>[orig_patent_app_number] => 912508
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/912508 | Semiconductor device including stacked chips having metal patterned on circuit surface and on edge side of chip | Aug 17, 1997 | Issued |
Array
(
[id] => 3844789
[patent_doc_number] => 05847414
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-08
[patent_title] => 'Semiconductor device having a hetero-junction between SiC and a Group 3B-nitride'
[patent_app_type] => 1
[patent_app_number] => 8/912357
[patent_app_country] => US
[patent_app_date] => 1997-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2857
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/847/05847414.pdf
[firstpage_image] =>[orig_patent_app_number] => 912357
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/912357 | Semiconductor device having a hetero-junction between SiC and a Group 3B-nitride | Aug 17, 1997 | Issued |
Array
(
[id] => 3909347
[patent_doc_number] => 05898220
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Multi-chip device and method of fabrication employing leads over and under processes'
[patent_app_type] => 1
[patent_app_number] => 8/911501
[patent_app_country] => US
[patent_app_date] => 1997-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3261
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 328
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/898/05898220.pdf
[firstpage_image] =>[orig_patent_app_number] => 911501
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/911501 | Multi-chip device and method of fabrication employing leads over and under processes | Aug 13, 1997 | Issued |
Array
(
[id] => 4031510
[patent_doc_number] => 05903027
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-11
[patent_title] => 'MOSFET with solid phase diffusion source'
[patent_app_type] => 1
[patent_app_number] => 8/910222
[patent_app_country] => US
[patent_app_date] => 1997-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 127
[patent_no_of_words] => 19102
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/903/05903027.pdf
[firstpage_image] =>[orig_patent_app_number] => 910222
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/910222 | MOSFET with solid phase diffusion source | Aug 12, 1997 | Issued |
Array
(
[id] => 3933230
[patent_doc_number] => 05877541
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-02
[patent_title] => 'Contact structure for improving photoresist adhesion on a dielectric layer'
[patent_app_type] => 1
[patent_app_number] => 8/905918
[patent_app_country] => US
[patent_app_date] => 1997-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1536
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/877/05877541.pdf
[firstpage_image] =>[orig_patent_app_number] => 905918
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/905918 | Contact structure for improving photoresist adhesion on a dielectric layer | Aug 3, 1997 | Issued |
Array
(
[id] => 3909095
[patent_doc_number] => 05898203
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Semiconductor device having solid phase diffusion sources'
[patent_app_type] => 1
[patent_app_number] => 8/903387
[patent_app_country] => US
[patent_app_date] => 1997-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 97
[patent_no_of_words] => 14311
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[pdf_file] => patents/05/898/05898203.pdf
[firstpage_image] =>[orig_patent_app_number] => 903387
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/903387 | Semiconductor device having solid phase diffusion sources | Jul 29, 1997 | Issued |
Array
(
[id] => 3999287
[patent_doc_number] => 05920113
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Leadframe structure having moveable sub-frame'
[patent_app_type] => 1
[patent_app_number] => 8/900658
[patent_app_country] => US
[patent_app_date] => 1997-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1917
[patent_no_of_claims] => 10
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/920/05920113.pdf
[firstpage_image] =>[orig_patent_app_number] => 900658
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900658 | Leadframe structure having moveable sub-frame | Jul 24, 1997 | Issued |
Array
(
[id] => 3972712
[patent_doc_number] => 05886402
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Semiconductor device card'
[patent_app_type] => 1
[patent_app_number] => 8/899812
[patent_app_country] => US
[patent_app_date] => 1997-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2113
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/886/05886402.pdf
[firstpage_image] =>[orig_patent_app_number] => 899812
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/899812 | Semiconductor device card | Jul 23, 1997 | Issued |
Array
(
[id] => 3985319
[patent_doc_number] => 05949141
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Laminated film/metal structures'
[patent_app_type] => 1
[patent_app_number] => 8/898099
[patent_app_country] => US
[patent_app_date] => 1997-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 22
[patent_no_of_words] => 2727
[patent_no_of_claims] => 15
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/949/05949141.pdf
[firstpage_image] =>[orig_patent_app_number] => 898099
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/898099 | Laminated film/metal structures | Jul 21, 1997 | Issued |
Array
(
[id] => 3892186
[patent_doc_number] => 05777347
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Vertical CMOS digital multi-valued restoring logic device'
[patent_app_type] => 1
[patent_app_number] => 8/896895
[patent_app_country] => US
[patent_app_date] => 1997-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[patent_no_of_words] => 7250
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[pdf_file] => patents/05/777/05777347.pdf
[firstpage_image] =>[orig_patent_app_number] => 896895
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/896895 | Vertical CMOS digital multi-valued restoring logic device | Jul 17, 1997 | Issued |
Array
(
[id] => 3947749
[patent_doc_number] => 05982026
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Inexpensive resin molded semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/895202
[patent_app_country] => US
[patent_app_date] => 1997-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 2402
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/982/05982026.pdf
[firstpage_image] =>[orig_patent_app_number] => 895202
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/895202 | Inexpensive resin molded semiconductor device | Jul 15, 1997 | Issued |
Array
(
[id] => 3932045
[patent_doc_number] => 05952712
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Packaged semiconductor device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/893988
[patent_app_country] => US
[patent_app_date] => 1997-07-16
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/952/05952712.pdf
[firstpage_image] =>[orig_patent_app_number] => 893988
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/893988 | Packaged semiconductor device and method of manufacturing the same | Jul 15, 1997 | Issued |
Array
(
[id] => 3883618
[patent_doc_number] => 05729056
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Low cycle time CMOS process'
[patent_app_type] => 1
[patent_app_number] => 8/892335
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[pdf_file] => patents/05/729/05729056.pdf
[firstpage_image] =>[orig_patent_app_number] => 892335
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/892335 | Low cycle time CMOS process | Jul 13, 1997 | Issued |
Array
(
[id] => 4056991
[patent_doc_number] => 05932890
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-03
[patent_title] => 'Field effect transistor loaded with multiquantum barrier'
[patent_app_type] => 1
[patent_app_number] => 8/884319
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[pdf_file] => patents/05/932/05932890.pdf
[firstpage_image] =>[orig_patent_app_number] => 884319
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/884319 | Field effect transistor loaded with multiquantum barrier | Jun 26, 1997 | Issued |
Array
(
[id] => 3987374
[patent_doc_number] => 05861639
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-19
[patent_title] => 'Breakover-triggered dipole component having a controlled sensitivity'
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[patent_app_number] => 8/880856
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[pdf_file] => patents/05/861/05861639.pdf
[firstpage_image] =>[orig_patent_app_number] => 880856
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/880856 | Breakover-triggered dipole component having a controlled sensitivity | Jun 22, 1997 | Issued |
Array
(
[id] => 3972742
[patent_doc_number] => 05886404
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Bottom lead semiconductor package having folded leads'
[patent_app_type] => 1
[patent_app_number] => 8/877563
[patent_app_country] => US
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[pdf_file] => patents/05/886/05886404.pdf
[firstpage_image] =>[orig_patent_app_number] => 877563
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877563 | Bottom lead semiconductor package having folded leads | Jun 16, 1997 | Issued |
Array
(
[id] => 3903684
[patent_doc_number] => 05751034
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'High dielectric constant barium-strontium-niobium oxides for integrated circuit applications'
[patent_app_type] => 1
[patent_app_number] => 8/873827
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[firstpage_image] =>[orig_patent_app_number] => 873827
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873827 | High dielectric constant barium-strontium-niobium oxides for integrated circuit applications | Jun 11, 1997 | Issued |
Array
(
[id] => 3903955
[patent_doc_number] => 05751053
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Semiconductor device having a bipolar transistor and method of manufacturing the same'
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[patent_app_number] => 8/870267
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[pdf_file] => patents/05/751/05751053.pdf
[firstpage_image] =>[orig_patent_app_number] => 870267
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/870267 | Semiconductor device having a bipolar transistor and method of manufacturing the same | Jun 8, 1997 | Issued |
Array
(
[id] => 3830314
[patent_doc_number] => 05731626
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-24
[patent_title] => 'Process for controlling dopant diffusion in a semiconductor layer and semiconductor layer formed thereby'
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/731/05731626.pdf
[firstpage_image] =>[orig_patent_app_number] => 862226
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/862226 | Process for controlling dopant diffusion in a semiconductor layer and semiconductor layer formed thereby | May 22, 1997 | Issued |