Nathan K. Kelley

Array ( [id] => 3820540 [patent_doc_number] => 05789781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Silicon-on-insulator (SOI) semiconductor device and method of making the same' [patent_app_type] => 1 [patent_app_number] => 8/861189 [patent_app_country] => US [patent_app_date] => 1997-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3258 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/789/05789781.pdf [firstpage_image] =>[orig_patent_app_number] => 861189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954135 [patent_doc_number] => 05977617 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Semiconductor device having multilayer film carrier' [patent_app_type] => 1 [patent_app_number] => 8/854883 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 44 [patent_no_of_words] => 5619 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977617.pdf [firstpage_image] =>[orig_patent_app_number] => 854883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3999458 [patent_doc_number] => 05920125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Interconnection of a carrier substrate and a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/853942 [patent_app_country] => US [patent_app_date] => 1997-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2689 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920125.pdf [firstpage_image] =>[orig_patent_app_number] => 853942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031933 [patent_doc_number] => 05903056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Conductive polymer film bonding technique' [patent_app_type] => 1 [patent_app_number] => 8/845111 [patent_app_country] => US [patent_app_date] => 1997-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2598 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903056.pdf [firstpage_image] =>[orig_patent_app_number] => 845111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3961029 [patent_doc_number] => 05936280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Multilayer quadruple gate field effect transistor structure for use in integrated circuit devices' [patent_app_type] => 1 [patent_app_number] => 8/837557 [patent_app_country] => US [patent_app_date] => 1997-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4441 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936280.pdf [firstpage_image] =>[orig_patent_app_number] => 837557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3761232 [patent_doc_number] => 05721446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Semiconductor pressure sensor with spacing member disposed between sensor and substrate' [patent_app_type] => 1 [patent_app_number] => 8/834275 [patent_app_country] => US [patent_app_date] => 1997-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1708 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721446.pdf [firstpage_image] =>[orig_patent_app_number] => 834275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4020223 [patent_doc_number] => 05880526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Barrier metal layer' [patent_app_type] => 1 [patent_app_number] => 8/843239 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3418 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880526.pdf [firstpage_image] =>[orig_patent_app_number] => 843239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3782366 [patent_doc_number] => 05818108 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'High-density, highly reliable integrated circuit assembly' [patent_app_type] => 1 [patent_app_number] => 8/837091 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3879 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818108.pdf [firstpage_image] =>[orig_patent_app_number] => 837091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3780465 [patent_doc_number] => 05808356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Lead-frame having unused input/output terminals separated from input/output terminals connected to input/output strip lines' [patent_app_type] => 1 [patent_app_number] => 8/831699 [patent_app_country] => US [patent_app_date] => 1997-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2421 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808356.pdf [firstpage_image] =>[orig_patent_app_number] => 831699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3939280 [patent_doc_number] => 05939785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Micromechanical device including time-release passivant' [patent_app_type] => 1 [patent_app_number] => 8/833166 [patent_app_country] => US [patent_app_date] => 1997-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3381 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/939/05939785.pdf [firstpage_image] =>[orig_patent_app_number] => 833166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3776081 [patent_doc_number] => 05850102 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Semiconductor device having a second insulating layer which includes carbon or fluorine at a density lower than a first insulating layer' [patent_app_type] => 1 [patent_app_number] => 8/831967 [patent_app_country] => US [patent_app_date] => 1997-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5778 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850102.pdf [firstpage_image] =>[orig_patent_app_number] => 831967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4027253 [patent_doc_number] => 05925928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Data carrier card, assembly of at least two data carrier cards and method of accessing at least one of the data carrier cards' [patent_app_type] => 1 [patent_app_number] => 8/828697 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3533 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925928.pdf [firstpage_image] =>[orig_patent_app_number] => 828697 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4020106 [patent_doc_number] => 05880518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor device including a two-layer protective insulating layer' [patent_app_type] => 1 [patent_app_number] => 8/827555 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3495 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880518.pdf [firstpage_image] =>[orig_patent_app_number] => 827555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4080654 [patent_doc_number] => 05965946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Package having Au layer semiconductor device having Au layer' [patent_app_type] => 1 [patent_app_number] => 8/824408 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4887 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/965/05965946.pdf [firstpage_image] =>[orig_patent_app_number] => 824408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4038810 [patent_doc_number] => 05942797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Power semiconductor module' [patent_app_type] => 1 [patent_app_number] => 8/824390 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5944 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942797.pdf [firstpage_image] =>[orig_patent_app_number] => 824390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3782253 [patent_doc_number] => 05818100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Product resulting from selective deposition of polysilicon over single crystal silicon substrate' [patent_app_type] => 1 [patent_app_number] => 8/823829 [patent_app_country] => US [patent_app_date] => 1997-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4534 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818100.pdf [firstpage_image] =>[orig_patent_app_number] => 823829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3802305 [patent_doc_number] => 05828132 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Semiconductor device having perfluorinated and non-fluorinated parylene intermetal dielectric' [patent_app_type] => 1 [patent_app_number] => 8/821875 [patent_app_country] => US [patent_app_date] => 1997-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1808 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828132.pdf [firstpage_image] =>[orig_patent_app_number] => 821875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4027209 [patent_doc_number] => 05925926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Semiconductor device including an inner lead reinforcing pattern' [patent_app_type] => 1 [patent_app_number] => 8/820107 [patent_app_country] => US [patent_app_date] => 1997-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1179 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925926.pdf [firstpage_image] =>[orig_patent_app_number] => 820107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3765896 [patent_doc_number] => 05742099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Power bus for an integrated circuit including end-to-end arranged segments providing power and ground' [patent_app_type] => 1 [patent_app_number] => 8/821707 [patent_app_country] => US [patent_app_date] => 1997-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2454 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742099.pdf [firstpage_image] =>[orig_patent_app_number] => 821707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3794862 [patent_doc_number] => 05841194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Chip carrier with peripheral stiffener and semiconductor device using the same' [patent_app_type] => 1 [patent_app_number] => 8/814984 [patent_app_country] => US [patent_app_date] => 1997-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4788 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841194.pdf [firstpage_image] =>[orig_patent_app_number] => 814984 [rel_patent_id] =>[rel_patent_doc_number] =>)