
Nathan K. Kelley
Examiner (ID: 10068)
| Most Active Art Unit | 2503 |
| Art Unit(s) | 2814, 2503 |
| Total Applications | 343 |
| Issued Applications | 248 |
| Pending Applications | 21 |
| Abandoned Applications | 74 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3878882
[patent_doc_number] => 05763906
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Mid infrared light emitting diode'
[patent_app_type] => 1
[patent_app_number] => 8/776531
[patent_app_country] => US
[patent_app_date] => 1997-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 3227
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/763/05763906.pdf
[firstpage_image] =>[orig_patent_app_number] => 776531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/776531 | Mid infrared light emitting diode | Mar 12, 1997 | Issued |
Array
(
[id] => 4003081
[patent_doc_number] => 05923089
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Efficient routing method and resulting structure for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/816005
[patent_app_country] => US
[patent_app_date] => 1997-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 7554
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/923/05923089.pdf
[firstpage_image] =>[orig_patent_app_number] => 816005
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/816005 | Efficient routing method and resulting structure for integrated circuits | Mar 9, 1997 | Issued |
Array
(
[id] => 4026775
[patent_doc_number] => 05925896
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-20
[patent_title] => 'Surface-emitting semiconductor optical device'
[patent_app_type] => 1
[patent_app_number] => 8/813427
[patent_app_country] => US
[patent_app_date] => 1997-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 9358
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 341
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/925/05925896.pdf
[firstpage_image] =>[orig_patent_app_number] => 813427
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/813427 | Surface-emitting semiconductor optical device | Mar 9, 1997 | Issued |
Array
(
[id] => 3933113
[patent_doc_number] => 05877533
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-02
[patent_title] => 'Hybrid integrated circuit component'
[patent_app_type] => 1
[patent_app_number] => 8/812453
[patent_app_country] => US
[patent_app_date] => 1997-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 32
[patent_no_of_words] => 12053
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/877/05877533.pdf
[firstpage_image] =>[orig_patent_app_number] => 812453
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/812453 | Hybrid integrated circuit component | Mar 5, 1997 | Issued |
Array
(
[id] => 4038412
[patent_doc_number] => 05994773
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Ball grid array semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 8/811810
[patent_app_country] => US
[patent_app_date] => 1997-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 3072
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/994/05994773.pdf
[firstpage_image] =>[orig_patent_app_number] => 811810
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/811810 | Ball grid array semiconductor package | Mar 5, 1997 | Issued |
Array
(
[id] => 4038711
[patent_doc_number] => 05942791
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-24
[patent_title] => 'Micromachined devices having microbridge structure'
[patent_app_type] => 1
[patent_app_number] => 8/811410
[patent_app_country] => US
[patent_app_date] => 1997-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2521
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/942/05942791.pdf
[firstpage_image] =>[orig_patent_app_number] => 811410
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/811410 | Micromachined devices having microbridge structure | Mar 3, 1997 | Issued |
Array
(
[id] => 3801585
[patent_doc_number] => 05828082
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Thin film transistor having dual insulation layer with a window above gate electrode'
[patent_app_type] => 1
[patent_app_number] => 8/810094
[patent_app_country] => US
[patent_app_date] => 1997-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 46
[patent_no_of_words] => 3446
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 366
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/828/05828082.pdf
[firstpage_image] =>[orig_patent_app_number] => 810094
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/810094 | Thin film transistor having dual insulation layer with a window above gate electrode | Mar 2, 1997 | Issued |
Array
(
[id] => 3746034
[patent_doc_number] => 05786624
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-28
[patent_title] => 'Dual masking for selective gap fill of submicron interconnects'
[patent_app_type] => 1
[patent_app_number] => 8/803847
[patent_app_country] => US
[patent_app_date] => 1997-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 22
[patent_no_of_words] => 4036
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/786/05786624.pdf
[firstpage_image] =>[orig_patent_app_number] => 803847
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/803847 | Dual masking for selective gap fill of submicron interconnects | Feb 27, 1997 | Issued |
Array
(
[id] => 3985370
[patent_doc_number] => 05949145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Semiconductor device including alignment marks'
[patent_app_type] => 1
[patent_app_number] => 8/807327
[patent_app_country] => US
[patent_app_date] => 1997-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 23
[patent_no_of_words] => 7540
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/949/05949145.pdf
[firstpage_image] =>[orig_patent_app_number] => 807327
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/807327 | Semiconductor device including alignment marks | Feb 26, 1997 | Issued |
Array
(
[id] => 3998395
[patent_doc_number] => 05892269
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Semiconductor device including an intrusion film layer'
[patent_app_type] => 1
[patent_app_number] => 8/806425
[patent_app_country] => US
[patent_app_date] => 1997-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 6390
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/892/05892269.pdf
[firstpage_image] =>[orig_patent_app_number] => 806425
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/806425 | Semiconductor device including an intrusion film layer | Feb 25, 1997 | Issued |
Array
(
[id] => 3950587
[patent_doc_number] => 05990552
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-23
[patent_title] => 'Apparatus for attaching a heat sink to the back side of a flip chip package'
[patent_app_type] => 1
[patent_app_number] => 8/797773
[patent_app_country] => US
[patent_app_date] => 1997-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2592
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/990/05990552.pdf
[firstpage_image] =>[orig_patent_app_number] => 797773
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/797773 | Apparatus for attaching a heat sink to the back side of a flip chip package | Feb 6, 1997 | Issued |
Array
(
[id] => 4010344
[patent_doc_number] => 05859478
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Semiconductor device including a main alignment mark having peripheral minute alignment marks'
[patent_app_type] => 1
[patent_app_number] => 8/797447
[patent_app_country] => US
[patent_app_date] => 1997-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 3080
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/859/05859478.pdf
[firstpage_image] =>[orig_patent_app_number] => 797447
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/797447 | Semiconductor device including a main alignment mark having peripheral minute alignment marks | Feb 5, 1997 | Issued |
Array
(
[id] => 3812645
[patent_doc_number] => 05831330
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'Die seal structure for a semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/786771
[patent_app_country] => US
[patent_app_date] => 1997-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 1611
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/831/05831330.pdf
[firstpage_image] =>[orig_patent_app_number] => 786771
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/786771 | Die seal structure for a semiconductor integrated circuit | Jan 20, 1997 | Issued |
Array
(
[id] => 3766830
[patent_doc_number] => 05844301
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Balanced integrated semiconductor device operating with a parallel resonator circuit'
[patent_app_type] => 1
[patent_app_number] => 8/787527
[patent_app_country] => US
[patent_app_date] => 1997-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 4389
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844301.pdf
[firstpage_image] =>[orig_patent_app_number] => 787527
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/787527 | Balanced integrated semiconductor device operating with a parallel resonator circuit | Jan 20, 1997 | Issued |
Array
(
[id] => 3780285
[patent_doc_number] => 05808345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'High speed IGBT'
[patent_app_type] => 1
[patent_app_number] => 8/784418
[patent_app_country] => US
[patent_app_date] => 1997-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2670
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/808/05808345.pdf
[firstpage_image] =>[orig_patent_app_number] => 784418
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/784418 | High speed IGBT | Jan 15, 1997 | Issued |
Array
(
[id] => 3765866
[patent_doc_number] => 05742097
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-21
[patent_title] => 'Multilevel semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 8/782302
[patent_app_country] => US
[patent_app_date] => 1997-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 9195
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/742/05742097.pdf
[firstpage_image] =>[orig_patent_app_number] => 782302
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/782302 | Multilevel semiconductor integrated circuit device | Jan 14, 1997 | Issued |
Array
(
[id] => 3954894
[patent_doc_number] => 05955788
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-21
[patent_title] => 'Semiconductor device having multilevel wiring with improved planarity'
[patent_app_type] => 1
[patent_app_number] => 8/782945
[patent_app_country] => US
[patent_app_date] => 1997-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 19
[patent_no_of_words] => 2206
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/955/05955788.pdf
[firstpage_image] =>[orig_patent_app_number] => 782945
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/782945 | Semiconductor device having multilevel wiring with improved planarity | Jan 12, 1997 | Issued |
Array
(
[id] => 3896352
[patent_doc_number] => 05834837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'Semiconductor package having leads with step-shaped dimples'
[patent_app_type] => 1
[patent_app_number] => 8/775955
[patent_app_country] => US
[patent_app_date] => 1997-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 1803
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/834/05834837.pdf
[firstpage_image] =>[orig_patent_app_number] => 775955
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/775955 | Semiconductor package having leads with step-shaped dimples | Jan 2, 1997 | Issued |
Array
(
[id] => 3874111
[patent_doc_number] => 05838021
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Single electron digital circuits'
[patent_app_type] => 1
[patent_app_number] => 8/773155
[patent_app_country] => US
[patent_app_date] => 1996-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 4449
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/838/05838021.pdf
[firstpage_image] =>[orig_patent_app_number] => 773155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/773155 | Single electron digital circuits | Dec 25, 1996 | Issued |
Array
(
[id] => 3954049
[patent_doc_number] => 05977612
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Semiconductor devices constructed from crystallites'
[patent_app_type] => 1
[patent_app_number] => 8/770403
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5483
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/977/05977612.pdf
[firstpage_image] =>[orig_patent_app_number] => 770403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/770403 | Semiconductor devices constructed from crystallites | Dec 19, 1996 | Issued |