Search

Nathan Sadler

Examiner (ID: 17222, Phone: (571)270-7699 , Office: P/2139 )

Most Active Art Unit
2139
Art Unit(s)
2139, 2189
Total Applications
800
Issued Applications
558
Pending Applications
60
Abandoned Applications
200

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18303429 [patent_doc_number] => 11625332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Cache miss handling for read operations in data processing systems [patent_app_type] => utility [patent_app_number] => 16/742519 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 16279 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742519 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742519
Cache miss handling for read operations in data processing systems Jan 13, 2020 Issued
Array ( [id] => 16285323 [patent_doc_number] => 20200278925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 16/740528 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740528
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM Jan 12, 2020 Abandoned
Array ( [id] => 16844602 [patent_doc_number] => 11016687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Writing file information for tape file systems [patent_app_type] => utility [patent_app_number] => 16/735136 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 14712 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735136
Writing file information for tape file systems Jan 5, 2020 Issued
Array ( [id] => 17046828 [patent_doc_number] => 11100009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Intelligent detection and ejection of unused application components [patent_app_type] => utility [patent_app_number] => 16/733767 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6775 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733767 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733767
Intelligent detection and ejection of unused application components Jan 2, 2020 Issued
Array ( [id] => 18370762 [patent_doc_number] => 11650937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Storage system and method for secure host controller memory buffer access [patent_app_type] => utility [patent_app_number] => 16/731590 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731590 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/731590
Storage system and method for secure host controller memory buffer access Dec 30, 2019 Issued
Array ( [id] => 17786339 [patent_doc_number] => 11409462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Data removal marking in a memory device [patent_app_type] => utility [patent_app_number] => 16/959064 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11105 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959064 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959064
Data removal marking in a memory device Dec 30, 2019 Issued
Array ( [id] => 17252970 [patent_doc_number] => 11188459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Data block switching at a memory sub-system [patent_app_type] => utility [patent_app_number] => 16/725792 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725792 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725792
Data block switching at a memory sub-system Dec 22, 2019 Issued
Array ( [id] => 16918759 [patent_doc_number] => 20210191851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SYSTEM AND METHOD FOR FACILITATING REDUCTION OF LATENCY AND MITIGATION OF WRITE AMPLIFICATION IN A MULTI-TENANCY STORAGE DRIVE [patent_app_type] => utility [patent_app_number] => 16/725038 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725038 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725038
System and method for facilitating reduction of latency and mitigation of write amplification in a multi-tenancy storage drive Dec 22, 2019 Issued
Array ( [id] => 17331486 [patent_doc_number] => 11221950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Storage system and method for interleaving data for enhanced quality of service [patent_app_type] => utility [patent_app_number] => 16/720600 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/720600
Storage system and method for interleaving data for enhanced quality of service Dec 18, 2019 Issued
Array ( [id] => 19061689 [patent_doc_number] => 11940923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-26 [patent_title] => Cost based cache eviction [patent_app_type] => utility [patent_app_number] => 16/711296 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10413 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711296
Cost based cache eviction Dec 10, 2019 Issued
Array ( [id] => 16314703 [patent_doc_number] => 20200293441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => DATA STORAGE DEVICES AND DATA PROCESSING METHODS [patent_app_type] => utility [patent_app_number] => 16/699989 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6759 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/699989
Data storage devices and data processing methods with dynamic programming scheme Dec 1, 2019 Issued
Array ( [id] => 16872105 [patent_doc_number] => 20210165572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => FEEDBACK LOOPS IN DATA REPLICATION [patent_app_type] => utility [patent_app_number] => 16/699973 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/699973
Feedback loops in data replication Dec 1, 2019 Issued
Array ( [id] => 15711877 [patent_doc_number] => 20200102704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SYSTEM AND METHOD TO MANAGE AND SHARE MANAGED RUNTIME MEMORY FOR JAVA VIRTUAL MACHINE [patent_app_type] => utility [patent_app_number] => 16/696148 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696148 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696148
System and method to manage and share managed runtime memory for java virtual machine Nov 25, 2019 Issued
Array ( [id] => 16849055 [patent_doc_number] => 20210149800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => SSD SYSTEM USING POWER-CYCLE BASED READ SCRUB [patent_app_type] => utility [patent_app_number] => 16/689693 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689693 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689693
SSD SYSTEM USING POWER-CYCLE BASED READ SCRUB Nov 19, 2019 Abandoned
Array ( [id] => 15775177 [patent_doc_number] => 20200118606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => MEMORY CONTROLLER ARCHITECTURE WITH IMPROVED MEMORY SCHEDULING EFFICIENCY [patent_app_type] => utility [patent_app_number] => 16/684370 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684370
MEMORY CONTROLLER ARCHITECTURE WITH IMPROVED MEMORY SCHEDULING EFFICIENCY Nov 13, 2019 Abandoned
Array ( [id] => 17151130 [patent_doc_number] => 11144207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Accelerating memory compression of a physically scattered buffer [patent_app_type] => utility [patent_app_number] => 16/676851 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676851
Accelerating memory compression of a physically scattered buffer Nov 6, 2019 Issued
Array ( [id] => 18218288 [patent_doc_number] => 11593226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => System and method for ensuring compliance of protection policy requirements using visual representation of backups [patent_app_type] => utility [patent_app_number] => 16/672303 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8950 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/672303
System and method for ensuring compliance of protection policy requirements using visual representation of backups Oct 31, 2019 Issued
Array ( [id] => 15561673 [patent_doc_number] => 20200065248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => INTEGRATED CIRCUIT AND ADDRESS MAPPING METHOD FOR CACHE MEMORY [patent_app_type] => utility [patent_app_number] => 16/667054 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667054 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667054
Integrated circuit and address mapping method for cache memory Oct 28, 2019 Issued
Array ( [id] => 18637970 [patent_doc_number] => 11762569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Workload based relief valve activation for hybrid controller architectures [patent_app_type] => utility [patent_app_number] => 16/667702 [patent_app_country] => US [patent_app_date] => 2019-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15053 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667702 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/667702
Workload based relief valve activation for hybrid controller architectures Oct 28, 2019 Issued
Array ( [id] => 17151330 [patent_doc_number] => 11144408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => System and method for improving asynchronous replication performance in dual controller storage systems [patent_app_type] => utility [patent_app_number] => 16/662335 [patent_app_country] => US [patent_app_date] => 2019-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/662335
System and method for improving asynchronous replication performance in dual controller storage systems Oct 23, 2019 Issued
Menu