Search

Nathan Sadler

Examiner (ID: 17222, Phone: (571)270-7699 , Office: P/2139 )

Most Active Art Unit
2139
Art Unit(s)
2139, 2189
Total Applications
800
Issued Applications
558
Pending Applications
60
Abandoned Applications
200

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19514043 [patent_doc_number] => 20240345729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING THE SAME, AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/752798 [patent_app_country] => US [patent_app_date] => 2024-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752798 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752798
STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING THE SAME, AND OPERATING METHOD THEREOF Jun 24, 2024 Pending
Array ( [id] => 20609995 [patent_doc_number] => 12585597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Memory with write address delay circuit [patent_app_type] => utility [patent_app_number] => 18/747497 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 4620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747497 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747497
Memory with write address delay circuit Jun 18, 2024 Issued
Array ( [id] => 20242670 [patent_doc_number] => 12422988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Hardware revocation engine for temporal memory safety [patent_app_type] => utility [patent_app_number] => 18/741701 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741701 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741701
Hardware revocation engine for temporal memory safety Jun 11, 2024 Issued
Array ( [id] => 20666532 [patent_doc_number] => 12608307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Data storage device and method for writing updates to a host memory buffer using assistance from a host [patent_app_type] => utility [patent_app_number] => 18/736977 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 1231 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736977 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736977
Data storage device and method for writing updates to a host memory buffer using assistance from a host Jun 6, 2024 Issued
Array ( [id] => 20659195 [patent_doc_number] => 20260111238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => MEMORY SLOT CONTROL METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/168015 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19168015 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/168015
MEMORY SLOT CONTROL METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM May 30, 2024 Pending
Array ( [id] => 20351591 [patent_doc_number] => 20250348443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => DEVICE CONTROL METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 18/677920 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677920
DEVICE CONTROL METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT May 29, 2024 Pending
Array ( [id] => 20174779 [patent_doc_number] => 12393526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => NAND page buffer based security operations [patent_app_type] => utility [patent_app_number] => 18/672394 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672394
NAND page buffer based security operations May 22, 2024 Issued
Array ( [id] => 20528904 [patent_doc_number] => 12547339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Memory with efficient storage of event log data [patent_app_type] => utility [patent_app_number] => 18/646668 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 1214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646668 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/646668
Memory with efficient storage of event log data Apr 24, 2024 Issued
Array ( [id] => 20323274 [patent_doc_number] => 20250335362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => SYSTEMS, METHODS, AND MEDIA FOR PROVIDING APPEND-ONLY CACHES [patent_app_type] => utility [patent_app_number] => 18/645047 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645047 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/645047
SYSTEMS, METHODS, AND MEDIA FOR PROVIDING APPEND-ONLY CACHES Apr 23, 2024 Abandoned
Array ( [id] => 19558573 [patent_doc_number] => 20240370365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => LOGICAL-TO-PHYSICAL TABLE COMPRESSION USING AN EXCEPTION LIST AND A LOGICAL TREE [patent_app_type] => utility [patent_app_number] => 18/643514 [patent_app_country] => US [patent_app_date] => 2024-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643514 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/643514
Logical-to-physical table compression using an exception list and a logical tree Apr 22, 2024 Issued
Array ( [id] => 19362724 [patent_doc_number] => 20240264758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SUPERBLOCK-BASED WRITE MANAGEMENT IN NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/639821 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639821
Superblock-based write management in non-volatile memory devices Apr 17, 2024 Issued
Array ( [id] => 20758164 [patent_doc_number] => 12650935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-09 [patent_title] => Systems, methods, and apparatus for cache operation in storage devices [patent_app_type] => utility [patent_app_number] => 18/630988 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630988 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630988
Systems, methods, and apparatus for cache operation in storage devices Apr 8, 2024 Issued
Array ( [id] => 20249828 [patent_doc_number] => 20250298697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => BACKUP TECHNIQUES FOR NON-RELATIONAL METADATA [patent_app_type] => utility [patent_app_number] => 18/616054 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616054 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616054
BACKUP TECHNIQUES FOR NON-RELATIONAL METADATA Mar 24, 2024 Pending
Array ( [id] => 19452407 [patent_doc_number] => 20240312537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => EXECUTION OF A PROGRAM BIAS DISTURB MITIGATION OPERATION ASSOCIATED WITH PROGRAMMING OF MULTIPLE SUB-BLOCKS [patent_app_type] => utility [patent_app_number] => 18/605237 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605237 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605237
EXECUTION OF A PROGRAM BIAS DISTURB MITIGATION OPERATION ASSOCIATED WITH PROGRAMMING OF MULTIPLE SUB-BLOCKS Mar 13, 2024 Pending
Array ( [id] => 19250865 [patent_doc_number] => 20240201855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => IN-PLACE MEMORY COPY DURING REMOTE DATA TRANSFER IN HETEROGENEOUS COMPUTE ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 18/592952 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592952
In-place memory copy during remote data transfer in heterogeneous compute environment Feb 29, 2024 Issued
Array ( [id] => 20331374 [patent_doc_number] => 12461649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Open block management in memory devices [patent_app_type] => utility [patent_app_number] => 18/593165 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593165
Open block management in memory devices Feb 29, 2024 Issued
Array ( [id] => 20188709 [patent_doc_number] => 12399823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Memory device, flash memory controller and associated control method [patent_app_type] => utility [patent_app_number] => 18/592444 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 1138 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592444
Memory device, flash memory controller and associated control method Feb 28, 2024 Issued
Array ( [id] => 19235908 [patent_doc_number] => 20240193103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => MEMORY DEVICE, STORAGE MODULE, HOST AND OPERATING METHODS FOR PERFORMING A REFRESH OPERATION BASED ON TEMPERATURE INFORMATION [patent_app_type] => utility [patent_app_number] => 18/585210 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585210
Memory device, storage module, host and operating methods for performing a refresh operation based on temperature information Feb 22, 2024 Issued
Array ( [id] => 19933895 [patent_doc_number] => 12307100 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-20 [patent_title] => Data storage device and method for managing memory maintenance operations [patent_app_type] => utility [patent_app_number] => 18/441095 [patent_app_country] => US [patent_app_date] => 2024-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 1209 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441095 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/441095
Data storage device and method for managing memory maintenance operations Feb 13, 2024 Issued
Array ( [id] => 20215068 [patent_doc_number] => 12411721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Efficient memory management for heterogeneous computing [patent_app_type] => utility [patent_app_number] => 18/414870 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 11455 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414870 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414870
Efficient memory management for heterogeneous computing Jan 16, 2024 Issued
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