Search

Nathan Sadler

Examiner (ID: 16305, Phone: (571)270-7699 , Office: P/2139 )

Most Active Art Unit
2139
Art Unit(s)
2139, 2189
Total Applications
773
Issued Applications
539
Pending Applications
65
Abandoned Applications
201

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19551912 [patent_doc_number] => 12135617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Systems and methods for preventing data loss [patent_app_type] => utility [patent_app_number] => 17/751964 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17751964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/751964
Systems and methods for preventing data loss May 23, 2022 Issued
Array ( [id] => 18846827 [patent_doc_number] => 20230409231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY WITH EFFICIENT STORAGE OF EVENT LOG DATA [patent_app_type] => utility [patent_app_number] => 17/749128 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749128 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749128
Memory with efficient storage of event log data May 18, 2022 Issued
Array ( [id] => 19405764 [patent_doc_number] => 20240289275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/566583 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18566583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/566583
DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELECTRONIC DEVICE May 15, 2022 Pending
Array ( [id] => 19405764 [patent_doc_number] => 20240289275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/566583 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18566583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/566583
DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELECTRONIC DEVICE May 15, 2022 Pending
Array ( [id] => 17794290 [patent_doc_number] => 20220253382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => CACHE SIZE CHANGE [patent_app_type] => utility [patent_app_number] => 17/727912 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16069 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727912
Cache size change Apr 24, 2022 Issued
Array ( [id] => 17763510 [patent_doc_number] => 20220237122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => TAG UPDATE BUS FOR UPDATED COHERENCE STATE [patent_app_type] => utility [patent_app_number] => 17/723559 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723559 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723559
Tag update bus for updated coherence state Apr 18, 2022 Issued
Array ( [id] => 19398442 [patent_doc_number] => 12072805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => System and method to enter and exit a cache coherent interconnect [patent_app_type] => utility [patent_app_number] => 17/717148 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5281 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717148
System and method to enter and exit a cache coherent interconnect Apr 10, 2022 Issued
Array ( [id] => 18651396 [patent_doc_number] => 20230297232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => TABLE SORTING METHOD, MEMORY STORAGE DEVICE, AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 17/717168 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717168
TABLE SORTING METHOD, MEMORY STORAGE DEVICE, AND MEMORY CONTROL CIRCUIT UNIT Apr 10, 2022 Abandoned
Array ( [id] => 18694906 [patent_doc_number] => 20230325324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => CACHING TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/715459 [patent_app_country] => US [patent_app_date] => 2022-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17715459 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/715459
Caching techniques using a data deduplication cache and a data cache Apr 6, 2022 Issued
Array ( [id] => 18677988 [patent_doc_number] => 20230315635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SYSTEM COHERENCY PROTOCOL [patent_app_type] => utility [patent_app_number] => 17/657830 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657830
System coherency protocol Apr 3, 2022 Issued
Array ( [id] => 18060045 [patent_doc_number] => 20220391131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => COMPUTER-READABLE RECORDING MEDIUM, INFORMATION PROCESSING DEVICE CONTROL METHOD AND INFORMATION PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/710028 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710028 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/710028
COMPUTER-READABLE RECORDING MEDIUM, INFORMATION PROCESSING DEVICE CONTROL METHOD AND INFORMATION PROCESSING DEVICE Mar 30, 2022 Abandoned
Array ( [id] => 18630399 [patent_doc_number] => 20230289292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => METHOD AND APPARATUS FOR EFFICIENT ACCESS TO MULTIDIMENSIONAL DATA STRUCTURES AND/OR OTHER LARGE DATA BLOCKS [patent_app_type] => utility [patent_app_number] => 17/691422 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691422 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691422
Method and apparatus for efficient access to multidimensional data structures and/or other large data blocks Mar 9, 2022 Issued
Array ( [id] => 19122619 [patent_doc_number] => 11966605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Superblock-based write management in non-volatile memory devices [patent_app_type] => utility [patent_app_number] => 17/690287 [patent_app_country] => US [patent_app_date] => 2022-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17690287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/690287
Superblock-based write management in non-volatile memory devices Mar 8, 2022 Issued
Array ( [id] => 18839410 [patent_doc_number] => 11847484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Virtual machine image management using delta trees [patent_app_type] => utility [patent_app_number] => 17/689492 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 5173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/689492
Virtual machine image management using delta trees Mar 7, 2022 Issued
Array ( [id] => 18855622 [patent_doc_number] => 11853200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory system and controller to invalidate data corresponding to a logical address [patent_app_type] => utility [patent_app_number] => 17/653323 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 15816 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 557 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17653323 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/653323
Memory system and controller to invalidate data corresponding to a logical address Mar 2, 2022 Issued
Array ( [id] => 19122633 [patent_doc_number] => 11966621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Non-volatile storage system with program execution decoupled from dataload [patent_app_type] => utility [patent_app_number] => 17/674543 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 14380 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674543 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674543
Non-volatile storage system with program execution decoupled from dataload Feb 16, 2022 Issued
Array ( [id] => 18471409 [patent_doc_number] => 20230205695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => IN-KERNEL CACHING FOR DISTRIBUTED CACHE [patent_app_type] => utility [patent_app_number] => 17/561898 [patent_app_country] => US [patent_app_date] => 2021-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17561898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/561898
In-kernel caching for distributed cache Dec 23, 2021 Issued
Array ( [id] => 18414872 [patent_doc_number] => 11669414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => External dynamic virtual machine synchronization [patent_app_type] => utility [patent_app_number] => 17/550231 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 37295 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550231
External dynamic virtual machine synchronization Dec 13, 2021 Issued
Array ( [id] => 18079396 [patent_doc_number] => 20220405008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => MEMORY SYSTEM AND REFRESH CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/549707 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10945 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549707 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549707
MEMORY SYSTEM AND REFRESH CONTROL METHOD Dec 12, 2021 Abandoned
Array ( [id] => 19419841 [patent_doc_number] => 20240295964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => MEMORY CONTROLLER AND FLASH MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/027518 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18027518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/027518
MEMORY CONTROLLER AND FLASH MEMORY SYSTEM Nov 29, 2021 Abandoned
Menu