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Nathan W. Ha

Examiner (ID: 14314)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
2125
Issued Applications
1816
Pending Applications
114
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16536460 [patent_doc_number] => 10879073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Insulating gate separation structure for transistor devices [patent_app_type] => utility [patent_app_number] => 16/679829 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5485 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679829
Insulating gate separation structure for transistor devices Nov 10, 2019 Issued
Array ( [id] => 15587343 [patent_doc_number] => 20200070206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => MICROFABRICATED ULTRASONIC TRANSDUCER HAVING INDIVIDUAL CELLS WITH ELECTRICALLY ISOLATED ELECTRODE SECTIONS [patent_app_type] => utility [patent_app_number] => 16/679500 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679500
Microfabricated ultrasonic transducer having individual cells with electrically isolated electrode sections Nov 10, 2019 Issued
Array ( [id] => 15597983 [patent_doc_number] => 20200075526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/676439 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676439 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/676439
Package structure and method of manufacturing the same Nov 6, 2019 Issued
Array ( [id] => 15969615 [patent_doc_number] => 20200168559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => EMBEDDED REFERENCE LAYERS FOR SEMICONDUCTOR PACKAGE SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/663853 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663853 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/663853
Embedded reference layers for semiconductor package substrates Oct 24, 2019 Issued
Array ( [id] => 16348150 [patent_doc_number] => 20200312801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => SEMICONDUCTOR PACKAGE SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/663735 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/663735
Semiconductor package substrate and method of manufacturing semiconductor package using the same Oct 24, 2019 Issued
Array ( [id] => 15840541 [patent_doc_number] => 20200135553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/664317 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664317
Method of manufacturing semiconductor devices including formation of adhesion enhancement layer Oct 24, 2019 Issued
Array ( [id] => 15840807 [patent_doc_number] => 20200135686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SEMICONDUCTOR DIE WITH MULTIPLE CONTACT PADS ELECTRICALLY COUPLED TO A LEAD OF A LEAD FRAME [patent_app_type] => utility [patent_app_number] => 16/664568 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664568 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664568
Semiconductor die with multiple contact pads electrically coupled to a lead of a lead frame Oct 24, 2019 Issued
Array ( [id] => 16796045 [patent_doc_number] => 20210125862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SUPER VIA INTEGRATION IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/664677 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664677
SUPER VIA INTEGRATION IN INTEGRATED CIRCUITS Oct 24, 2019 Abandoned
Array ( [id] => 15869731 [patent_doc_number] => 20200142269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/664238 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664238
Display device Oct 24, 2019 Issued
Array ( [id] => 16803312 [patent_doc_number] => 10998265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Interface structures and methods for forming same [patent_app_type] => utility [patent_app_number] => 16/600227 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 11922 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600227 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600227
Interface structures and methods for forming same Oct 10, 2019 Issued
Array ( [id] => 20540347 [patent_doc_number] => 12557434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Solid state optoelectronic device with plated support substrate [patent_app_type] => utility [patent_app_number] => 16/597462 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597462 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/597462
Solid state optoelectronic device with plated support substrate Oct 8, 2019 Issued
Array ( [id] => 17319283 [patent_doc_number] => 20210408333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => DISPLAY DEVICE USING SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/288180 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288180 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/288180
Display device using semiconductor light emitting device and method for manufacturing the same Oct 7, 2019 Issued
Array ( [id] => 16911547 [patent_doc_number] => 11043597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Method for reducing contact resistance in semiconductor structures [patent_app_type] => utility [patent_app_number] => 16/595580 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16595580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/595580
Method for reducing contact resistance in semiconductor structures Oct 7, 2019 Issued
Array ( [id] => 15351771 [patent_doc_number] => 20200013777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING A MULTIGATE TRANSISTOR FORMED WITH FIN STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/574887 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574887 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574887
Semiconductor device including a multigate transistor formed with fin structure Sep 17, 2019 Issued
Array ( [id] => 15332163 [patent_doc_number] => 20200006411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => IMAGE PICKUP ELEMENT, METHOD OF MANUFACTURING IMAGE PICKUP ELEMENT, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/567620 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567620
Image pickup element, method of manufacturing image pickup element, and electronic apparatus Sep 10, 2019 Issued
Array ( [id] => 19670939 [patent_doc_number] => 12183710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Method for producing conductive tracks, and electronic module [patent_app_type] => utility [patent_app_number] => 17/270562 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3702 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17270562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/270562
Method for producing conductive tracks, and electronic module Aug 29, 2019 Issued
Array ( [id] => 15274499 [patent_doc_number] => 20190385984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/556116 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556116
Semiconductor memory device Aug 28, 2019 Issued
Array ( [id] => 18040337 [patent_doc_number] => 20220384554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/958921 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16958921 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/958921
Display substrate and manufacturing method thereof, and display device Aug 26, 2019 Issued
Array ( [id] => 15093059 [patent_doc_number] => 20190341341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 16/513919 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513919
Power module Jul 16, 2019 Issued
Array ( [id] => 15093213 [patent_doc_number] => 20190341418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING A SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/510445 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510445
Solid-state imaging device, method of manufacturing a solid-state imaging device, and electronic apparatus Jul 11, 2019 Issued
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