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Nathan W. Ha

Examiner (ID: 14314)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
2125
Issued Applications
1816
Pending Applications
114
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11233959 [patent_doc_number] => 09461196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Non-crystalline inorganic light emitting diode' [patent_app_type] => utility [patent_app_number] => 14/605550 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6001 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605550 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/605550
Non-crystalline inorganic light emitting diode Jan 25, 2015 Issued
Array ( [id] => 10230313 [patent_doc_number] => 20150115307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'SAPPHIRE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME AND NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT' [patent_app_type] => utility [patent_app_number] => 14/593728 [patent_app_country] => US [patent_app_date] => 2015-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8504 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14593728 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/593728
Sapphire substrate and method for manufacturing the same and nitride semiconductor light emitting element Jan 8, 2015 Issued
Array ( [id] => 11307603 [patent_doc_number] => 09515009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Packaged semiconductor device having leadframe features preventing delamination' [patent_app_type] => utility [patent_app_number] => 14/592011 [patent_app_country] => US [patent_app_date] => 2015-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2962 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14592011 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/592011
Packaged semiconductor device having leadframe features preventing delamination Jan 7, 2015 Issued
Array ( [id] => 10125258 [patent_doc_number] => 09159624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-13 [patent_title] => 'Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach' [patent_app_type] => utility [patent_app_number] => 14/589913 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 35 [patent_no_of_words] => 10328 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14589913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/589913
Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach Jan 4, 2015 Issued
Array ( [id] => 10993104 [patent_doc_number] => 20160190050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'METHOD FOR MANUFACTURING AN INTERPOSER, INTERPOSER AND CHIP PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/583755 [patent_app_country] => US [patent_app_date] => 2014-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2404 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583755 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583755
Method for manufacturing an interposer, interposer and chip package structure Dec 27, 2014 Issued
Array ( [id] => 10617887 [patent_doc_number] => 09337339 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-10 [patent_title] => 'Metal oxide semiconductor device and method for forming the same' [patent_app_type] => utility [patent_app_number] => 14/583600 [patent_app_country] => US [patent_app_date] => 2014-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3389 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583600 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583600
Metal oxide semiconductor device and method for forming the same Dec 26, 2014 Issued
Array ( [id] => 11302439 [patent_doc_number] => 09510463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Coreless packaging substrate and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 14/583317 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 3983 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583317
Coreless packaging substrate and fabrication method thereof Dec 25, 2014 Issued
Array ( [id] => 10345324 [patent_doc_number] => 20150230328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'WIRING SUBSTRATE AND SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/583227 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13509 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583227 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583227
Wiring substrate and semiconductor package Dec 25, 2014 Issued
Array ( [id] => 10360474 [patent_doc_number] => 20150245478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'WIRING SUBSTRATE AND METHOD OF MANUFACTURING WIRING SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/583230 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7648 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583230 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583230
Wiring substrate and method of manufacturing wiring substrate Dec 25, 2014 Issued
Array ( [id] => 10321811 [patent_doc_number] => 20150206816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'CHEMICAL SENSOR PACKAGE FOR HIGHLY PRESSURED ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 14/583261 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2352 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14583261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/583261
Chemical sensor package for highly pressured environment Dec 25, 2014 Issued
Array ( [id] => 10993031 [patent_doc_number] => 20160189977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'PATTERNING METHOD AND SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/582924 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582924 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582924
Patterning method and semiconductor structure Dec 23, 2014 Issued
Array ( [id] => 10504250 [patent_doc_number] => 09232655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Wiring substrate and light emitting device' [patent_app_type] => utility [patent_app_number] => 14/582282 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7608 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582282 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582282
Wiring substrate and light emitting device Dec 23, 2014 Issued
Array ( [id] => 10146725 [patent_doc_number] => 09179550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Method for manufacturing touch panel' [patent_app_type] => utility [patent_app_number] => 14/582445 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2714 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582445 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582445
Method for manufacturing touch panel Dec 23, 2014 Issued
Array ( [id] => 10993297 [patent_doc_number] => 20160190243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'STRUCTURE AND FORMATION METHOD OF FINFET DEVICE' [patent_app_type] => utility [patent_app_number] => 14/582975 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6271 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582975 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582975
Structure and formation method of FinFET device Dec 23, 2014 Issued
Array ( [id] => 11221572 [patent_doc_number] => 09449915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/582935 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4100 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582935 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582935
Semiconductor device and method of manufacturing the same Dec 23, 2014 Issued
Array ( [id] => 10570360 [patent_doc_number] => 09293539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Nitride semiconductor epitaxial wafer and nitride semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/582728 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5586 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582728 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582728
Nitride semiconductor epitaxial wafer and nitride semiconductor device Dec 23, 2014 Issued
Array ( [id] => 10418183 [patent_doc_number] => 20150303193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'INTEGRATED CIRCUIT AND RELATED MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 14/581671 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581671 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581671
Integrated circuit and related manufacturing method Dec 22, 2014 Issued
Array ( [id] => 10302751 [patent_doc_number] => 20150187751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'AMPLIFIER VOLTAGE LIMITING USING PUNCH-THROUGH EFFECT' [patent_app_type] => utility [patent_app_number] => 14/581668 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581668 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581668
Amplifier voltage limiting using punch-through effect Dec 22, 2014 Issued
Array ( [id] => 10583887 [patent_doc_number] => 09306014 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-05 [patent_title] => 'High-electron-mobility transistors' [patent_app_type] => utility [patent_app_number] => 14/581645 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10651 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581645 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581645
High-electron-mobility transistors Dec 22, 2014 Issued
Array ( [id] => 10472981 [patent_doc_number] => 20150357998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'METHOD OF OPERATING CHANNEL BUFFER BLOCK AND DEVICES INCLUDING THE CHANNEL BUFFER BLOCK' [patent_app_type] => utility [patent_app_number] => 14/581792 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581792 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/581792
Method of operating channel buffer block and devices including the channel buffer block Dec 22, 2014 Issued
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