
Nathan W. Ha
Examiner (ID: 14314)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 2125 |
| Issued Applications | 1816 |
| Pending Applications | 114 |
| Abandoned Applications | 221 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10472981
[patent_doc_number] => 20150357998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-10
[patent_title] => 'METHOD OF OPERATING CHANNEL BUFFER BLOCK AND DEVICES INCLUDING THE CHANNEL BUFFER BLOCK'
[patent_app_type] => utility
[patent_app_number] => 14/581792
[patent_app_country] => US
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Array
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[patent_doc_number] => 20150187751
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[patent_issue_date] => 2015-07-02
[patent_title] => 'AMPLIFIER VOLTAGE LIMITING USING PUNCH-THROUGH EFFECT'
[patent_app_type] => utility
[patent_app_number] => 14/581668
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/581668 | Amplifier voltage limiting using punch-through effect | Dec 22, 2014 | Issued |
Array
(
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[patent_issue_date] => 2015-06-25
[patent_title] => 'SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 14/581826
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/581826 | Semiconductor element, semiconductor device including the same, and method for manufacturing semiconductor element | Dec 22, 2014 | Issued |
Array
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[patent_doc_number] => 20150179897
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[patent_issue_date] => 2015-06-25
[patent_title] => 'LIGHT EMITTER COMPONENTS AND METHODS HAVING IMPROVED PERFORMANCE'
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[patent_app_number] => 14/579594
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[patent_app_date] => 2014-12-22
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Array
(
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[patent_title] => 'Semiconductor device and method of forming a shielding layer between stacked semiconductor die'
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Array
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[patent_title] => 'High-mobility multiple-gate transistor with improved on-to-off current ratio'
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Array
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[patent_title] => 'Tipless transistors, short-tip transistors, and methods and circuits therefor'
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Array
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[patent_title] => 'Semiconductor device and integrated apparatus comprising the same'
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Array
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Array
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[id] => 10269910
[patent_doc_number] => 20150154907
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[patent_issue_date] => 2015-06-04
[patent_title] => 'PIXEL DRIVER CIRCUIT AND PIXEL CIRCUIT HAVING CONTROL CIRCUIT COUPLED TO SUPPLY VOLTAGE'
[patent_app_type] => utility
[patent_app_number] => 14/516076
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/516076 | PIXEL DRIVER CIRCUIT AND PIXEL CIRCUIT HAVING CONTROL CIRCUIT COUPLED TO SUPPLY VOLTAGE | Oct 15, 2014 | Abandoned |
Array
(
[id] => 10753197
[patent_doc_number] => 20160099349
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[patent_issue_date] => 2016-04-07
[patent_title] => 'SEMICONDUCTOR DEVICE WITH NON-ISOLATED POWER TRANSISTOR WITH INTEGRATED DIODE PROTECTION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/507063 | Semiconductor device with non-isolated power transistor with integrated diode protection | Oct 5, 2014 | Issued |
Array
(
[id] => 10281334
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Array
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Array
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Array
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