Search

Nathan W. Ha

Examiner (ID: 14314)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
2125
Issued Applications
1816
Pending Applications
114
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10266961 [patent_doc_number] => 20150151958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'MEMS CHIP AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/411537 [patent_app_country] => US [patent_app_date] => 2013-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2858 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14411537 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/411537
MEMS chip and manufacturing method therefor Jun 28, 2013 Issued
Array ( [id] => 9118132 [patent_doc_number] => 20130285053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'Sputtering Target for Oxide Thin Film and Process for Producing the Sputtering Target' [patent_app_type] => utility [patent_app_number] => 13/926402 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 36047 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926402
Sputtering Target for Oxide Thin Film and Process for Producing the Sputtering Target Jun 24, 2013 Abandoned
Array ( [id] => 10971815 [patent_doc_number] => 20140374850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'Apparatus and Method for Shielding and Biasing in MEMS Devices Encapsulated by Active Circuitry' [patent_app_type] => utility [patent_app_number] => 13/926384 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3261 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926384 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926384
Apparatus and method for shielding and biasing in MEMS devices encapsulated by active circuitry Jun 24, 2013 Issued
Array ( [id] => 9119787 [patent_doc_number] => 20130286709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'BURIED BIT LINE ANTI-FUSE ONE-TIME-PROGRAMMABLE NONVOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/925419 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4662 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925419 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925419
Buried bit line anti-fuse one-time-programmable nonvolatile memory Jun 23, 2013 Issued
Array ( [id] => 9121509 [patent_doc_number] => 20130288431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'PACKAGE SUBSTRATES, SEMICONDUCTOR PACKAGES HAVING THE SAME, AND METHODS OF FABRICATING THE SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/924817 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 8384 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924817 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924817
Package substrates, semiconductor packages having the same, and methods of fabricating the semiconductor packages Jun 23, 2013 Issued
Array ( [id] => 9893214 [patent_doc_number] => 20150048413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/386132 [patent_app_country] => US [patent_app_date] => 2013-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5074 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14386132 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/386132
SEMICONDUCTOR DEVICE May 12, 2013 Abandoned
Array ( [id] => 9037859 [patent_doc_number] => 20130240497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'HEATING FLOOR' [patent_app_type] => utility [patent_app_number] => 13/891060 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891060 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/891060
Heating floor May 8, 2013 Issued
Array ( [id] => 10870932 [patent_doc_number] => 08896133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate' [patent_app_type] => utility [patent_app_number] => 13/870928 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 6214 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870928 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870928
Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate Apr 24, 2013 Issued
Array ( [id] => 9905890 [patent_doc_number] => 20150061090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/386099 [patent_app_country] => US [patent_app_date] => 2013-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3712 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14386099 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/386099
SEMICONDUCTOR DEVICE Apr 16, 2013 Abandoned
Array ( [id] => 9927403 [patent_doc_number] => 20150075595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'METHOD FOR PRODUCING A PHOTOVOLTAIC CELL WITH INTERDIGITATED CONTACTS IN THE BACK FACE' [patent_app_type] => utility [patent_app_number] => 14/390115 [patent_app_country] => US [patent_app_date] => 2013-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6472 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14390115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/390115
METHOD FOR PRODUCING A PHOTOVOLTAIC CELL WITH INTERDIGITATED CONTACTS IN THE BACK FACE Apr 2, 2013 Abandoned
Array ( [id] => 10537621 [patent_doc_number] => 09263255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Method for separating epitaxial layers from growth substrates, and semiconductor device using same' [patent_app_type] => utility [patent_app_number] => 14/386775 [patent_app_country] => US [patent_app_date] => 2013-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 62 [patent_no_of_words] => 17093 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14386775 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/386775
Method for separating epitaxial layers from growth substrates, and semiconductor device using same Mar 18, 2013 Issued
Array ( [id] => 9440769 [patent_doc_number] => 08709879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Method of forming a semiconductor package' [patent_app_type] => utility [patent_app_number] => 13/835683 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 49 [patent_no_of_words] => 11614 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835683 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835683
Method of forming a semiconductor package Mar 14, 2013 Issued
Array ( [id] => 9303818 [patent_doc_number] => 20140042492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'SEMICONDUCTOR BUFFER STRUCTURE, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE USING THE SEMICONDUCTOR BUFFER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/835704 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8747 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13835704 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/835704
Multi-layer semiconductor buffer structure, semiconductor device and method of manufacturing the semiconductor device using the multi-layer semiconductor buffer structure Mar 14, 2013 Issued
Array ( [id] => 9869658 [patent_doc_number] => 08957433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Sapphire substrate and method for manufacturing the same and nitride semiconductor light emitting element' [patent_app_type] => utility [patent_app_number] => 13/804453 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 8515 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13804453 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/804453
Sapphire substrate and method for manufacturing the same and nitride semiconductor light emitting element Mar 13, 2013 Issued
Array ( [id] => 9677586 [patent_doc_number] => 08816499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Electrical interconnections of semiconductor devices and methods for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/826694 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 5709 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826694 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826694
Electrical interconnections of semiconductor devices and methods for fabricating the same Mar 13, 2013 Issued
Array ( [id] => 9367281 [patent_doc_number] => 20140077154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'Semiconductor Material Doping' [patent_app_type] => utility [patent_app_number] => 13/803753 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13803753 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/803753
Semiconductor material doping Mar 13, 2013 Issued
Array ( [id] => 9728702 [patent_doc_number] => 20140264409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'ENGINEERED-PHOSPHOR LED PACKAGES AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 13/828498 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13893 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13828498 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/828498
Light-emitting devices having engineered phosphor elements Mar 13, 2013 Issued
Array ( [id] => 9316622 [patent_doc_number] => 20140048960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'PACKAGE SUBSTRATE, MANUFACTURING METHOD THEREOF, AND MOLD THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/827497 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5227 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827497 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827497
Package substrate, manufacturing method thereof, and mold therefor Mar 13, 2013 Issued
Array ( [id] => 9883241 [patent_doc_number] => 08970008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Wafer and integrated circuit chip having a crack stop structure' [patent_app_type] => utility [patent_app_number] => 13/829582 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 13 [patent_no_of_words] => 6229 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13829582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/829582
Wafer and integrated circuit chip having a crack stop structure Mar 13, 2013 Issued
Array ( [id] => 9729096 [patent_doc_number] => 20140264803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PACKAGE DEVICE INCLUDING AN OPENING IN A FLEXIBLE SUBSTRATE AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/828430 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5643 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13828430 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/828430
Package device including an opening in a flexible substrate and methods of forming the same Mar 13, 2013 Issued
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