
Nathan W. Ha
Examiner (ID: 14314)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814 |
| Total Applications | 2125 |
| Issued Applications | 1816 |
| Pending Applications | 114 |
| Abandoned Applications | 221 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8190166
[patent_doc_number] => 08183615
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[patent_kind] => B2
[patent_issue_date] => 2012-05-22
[patent_title] => 'Memory cell with a vertically oriented transistor coupled to a digit line and method of forming the same'
[patent_app_type] => utility
[patent_app_number] => 12/915650
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Array
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[patent_doc_number] => 20110181350
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[patent_issue_date] => 2011-07-28
[patent_title] => 'HIGH FREQUENCY SEMICONDUCTOR DEVICE'
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Array
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[patent_title] => 'Semiconductor device'
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Array
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[patent_issue_date] => 2012-09-25
[patent_title] => 'Semiconductor device'
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Array
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[patent_title] => 'LOW CLAMP VOLTAGE ESD METHOD'
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Array
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[patent_issue_date] => 2014-01-21
[patent_title] => 'Semiconductor structure and method for fabricating the same'
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Array
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[patent_title] => 'Opening structure with sidewall of an opening covered with a dielectric thin film'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/884198 | Opening structure with sidewall of an opening covered with a dielectric thin film | Sep 16, 2010 | Issued |
Array
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[id] => 7811625
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[patent_issue_date] => 2012-03-13
[patent_title] => 'Semiconductor device and method of manufacturing same'
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Array
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[patent_issue_date] => 2012-08-28
[patent_title] => 'Charge trapping nonvolatile memory devices with a high-K blocking insulation layer'
[patent_app_type] => utility
[patent_app_number] => 12/861366
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/861366 | Charge trapping nonvolatile memory devices with a high-K blocking insulation layer | Aug 22, 2010 | Issued |
Array
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[id] => 6368685
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[patent_issue_date] => 2010-12-16
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING PLURAL DRAM MEMORY CELLS AND A LOGIC CIRCUIT AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/861407
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/861407 | Semiconductor device having plural DRAM memory cells and a logic circuit and method for manufacturing the same | Aug 22, 2010 | Issued |
Array
(
[id] => 8858950
[patent_doc_number] => 08461486
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[patent_issue_date] => 2013-06-11
[patent_title] => 'Heating tile and heated floor using the same'
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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