Search

Navneet K. Gmahl

Examiner (ID: 3841, Phone: (571)272-5636 , Office: P/2166 )

Most Active Art Unit
2166
Art Unit(s)
2166
Total Applications
497
Issued Applications
269
Pending Applications
40
Abandoned Applications
195

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4548848 [patent_doc_number] => 07876629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Memory control methods capable of dynamically adjusting sampling points, and related circuits' [patent_app_type] => utility [patent_app_number] => 11/835422 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/876/07876629.pdf [firstpage_image] =>[orig_patent_app_number] => 11835422 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835422
Memory control methods capable of dynamically adjusting sampling points, and related circuits Aug 7, 2007 Issued
Array ( [id] => 5009520 [patent_doc_number] => 20070279998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/832859 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6321 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20070279998.pdf [firstpage_image] =>[orig_patent_app_number] => 11832859 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832859
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT Aug 1, 2007 Abandoned
Array ( [id] => 4691973 [patent_doc_number] => 20080084743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'Memory stucture capable of bit-wise write or overwrite' [patent_app_type] => utility [patent_app_number] => 11/888441 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7549 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084743.pdf [firstpage_image] =>[orig_patent_app_number] => 11888441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/888441
Memory structure capable of bit-wise write or overwrite Jul 30, 2007 Issued
Array ( [id] => 5044776 [patent_doc_number] => 20070263448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'OPERATING METHOD OF A NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/778657 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7127 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20070263448.pdf [firstpage_image] =>[orig_patent_app_number] => 11778657 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778657
OPERATING METHOD OF A NON-VOLATILE MEMORY Jul 16, 2007 Abandoned
Array ( [id] => 7594616 [patent_doc_number] => 07626846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'Method and media for improving ferroelectric domain stability in an information storage device' [patent_app_type] => utility [patent_app_number] => 11/778571 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3059 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626846.pdf [firstpage_image] =>[orig_patent_app_number] => 11778571 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778571
Method and media for improving ferroelectric domain stability in an information storage device Jul 15, 2007 Issued
Array ( [id] => 5015094 [patent_doc_number] => 20070258302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'NEGATIVE VOLTAGE DISCHARGE SCHEME TO IMPROVE SNAPBACK IN A NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/776221 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3821 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20070258302.pdf [firstpage_image] =>[orig_patent_app_number] => 11776221 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/776221
Negative voltage discharge scheme to improve snapback in a non-volatile memory Jul 10, 2007 Issued
Array ( [id] => 275293 [patent_doc_number] => 07561463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-14 [patent_title] => 'Thin film phase-change memory' [patent_app_type] => utility [patent_app_number] => 11/825193 [patent_app_country] => US [patent_app_date] => 2007-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 6417 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/561/07561463.pdf [firstpage_image] =>[orig_patent_app_number] => 11825193 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/825193
Thin film phase-change memory Jul 2, 2007 Issued
Array ( [id] => 6422175 [patent_doc_number] => 20100102319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'SPIN INJECTION DEVICE HAVING SEMICONDUCTOR-FERROMAGNETIC-SEMICONDUCTOR STRUCTURE AND SPIN TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 12/307741 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5979 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102319.pdf [firstpage_image] =>[orig_patent_app_number] => 12307741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/307741
Spin injection device having semiconductor-ferromagnetic-semiconductor structure and spin transistor Jun 28, 2007 Issued
Array ( [id] => 4931687 [patent_doc_number] => 20080002462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'MRAM Memory Cell Having a Weak Intrinsic Anisotropic Storage Layer and Method of Producing the Same' [patent_app_type] => utility [patent_app_number] => 11/769454 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6125 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20080002462.pdf [firstpage_image] =>[orig_patent_app_number] => 11769454 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769454
MRAM memory cell having a weak intrinsic anisotropic storage layer and method of producing the same Jun 26, 2007 Issued
Array ( [id] => 26203 [patent_doc_number] => 07796457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Motherboard with voltage regulator supporting DDR2 memory modules and DDR3 memory modules' [patent_app_type] => utility [patent_app_number] => 11/766105 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1371 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/796/07796457.pdf [firstpage_image] =>[orig_patent_app_number] => 11766105 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766105
Motherboard with voltage regulator supporting DDR2 memory modules and DDR3 memory modules Jun 20, 2007 Issued
Array ( [id] => 4758011 [patent_doc_number] => 20080310237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'CMOS Compatible Single-Poly Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 11/764736 [patent_app_country] => US [patent_app_date] => 2007-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0310/20080310237.pdf [firstpage_image] =>[orig_patent_app_number] => 11764736 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/764736
CMOS Compatible Single-Poly Non-Volatile Memory Jun 17, 2007 Abandoned
Array ( [id] => 4582576 [patent_doc_number] => 07830729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Digital filters with memory' [patent_app_type] => utility [patent_app_number] => 11/818989 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 11944 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/830/07830729.pdf [firstpage_image] =>[orig_patent_app_number] => 11818989 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/818989
Digital filters with memory Jun 14, 2007 Issued
Array ( [id] => 4459012 [patent_doc_number] => 07894275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Methods of communicating data using inversion and related systems' [patent_app_type] => utility [patent_app_number] => 11/818165 [patent_app_country] => US [patent_app_date] => 2007-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 12678 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894275.pdf [firstpage_image] =>[orig_patent_app_number] => 11818165 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/818165
Methods of communicating data using inversion and related systems Jun 12, 2007 Issued
Array ( [id] => 4795304 [patent_doc_number] => 20080006890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Magnetic storage device and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/810835 [patent_app_country] => US [patent_app_date] => 2007-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14533 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20080006890.pdf [firstpage_image] =>[orig_patent_app_number] => 11810835 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/810835
Magnetic storage device and method for producing the same Jun 5, 2007 Issued
Array ( [id] => 5061636 [patent_doc_number] => 20070223275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Nonvolatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 11/802168 [patent_app_country] => US [patent_app_date] => 2007-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2562 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20070223275.pdf [firstpage_image] =>[orig_patent_app_number] => 11802168 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/802168
Nonvolatile semiconductor storage device May 20, 2007 Issued
Array ( [id] => 578168 [patent_doc_number] => 07466575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Memory device programming using combined shaping and linear spreading' [patent_app_type] => utility [patent_app_number] => 11/995811 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4994 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466575.pdf [firstpage_image] =>[orig_patent_app_number] => 11995811 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/995811
Memory device programming using combined shaping and linear spreading May 9, 2007 Issued
Array ( [id] => 144207 [patent_doc_number] => 07688642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Non-volatile memory device and method for programming/erasing the same' [patent_app_type] => utility [patent_app_number] => 11/800555 [patent_app_country] => US [patent_app_date] => 2007-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4903 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688642.pdf [firstpage_image] =>[orig_patent_app_number] => 11800555 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/800555
Non-volatile memory device and method for programming/erasing the same May 3, 2007 Issued
Array ( [id] => 4958381 [patent_doc_number] => 20080272805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Method and apparatus for boundary scan programming of memory devices' [patent_app_type] => utility [patent_app_number] => 11/799507 [patent_app_country] => US [patent_app_date] => 2007-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8542 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20080272805.pdf [firstpage_image] =>[orig_patent_app_number] => 11799507 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/799507
Method and apparatus for boundary scan programming of memory devices May 1, 2007 Issued
Array ( [id] => 104522 [patent_doc_number] => 07729149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Content addressable memory cell including a junction field effect transistor' [patent_app_type] => utility [patent_app_number] => 11/799305 [patent_app_country] => US [patent_app_date] => 2007-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 19003 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/729/07729149.pdf [firstpage_image] =>[orig_patent_app_number] => 11799305 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/799305
Content addressable memory cell including a junction field effect transistor Apr 30, 2007 Issued
Array ( [id] => 4571287 [patent_doc_number] => 07839695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'High temperature methods for enhancing retention characteristics of memory devices' [patent_app_type] => utility [patent_app_number] => 11/741053 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4780 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839695.pdf [firstpage_image] =>[orig_patent_app_number] => 11741053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741053
High temperature methods for enhancing retention characteristics of memory devices Apr 26, 2007 Issued
Menu