
Navneet K. Gmahl
Examiner (ID: 3841, Phone: (571)272-5636 , Office: P/2166 )
| Most Active Art Unit | 2166 |
| Art Unit(s) | 2166 |
| Total Applications | 497 |
| Issued Applications | 269 |
| Pending Applications | 40 |
| Abandoned Applications | 195 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5054357
[patent_doc_number] => 20070057278
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-15
[patent_title] => 'Magnetic switching element and signal processing device using the same'
[patent_app_type] => utility
[patent_app_number] => 11/517559
[patent_app_country] => US
[patent_app_date] => 2006-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
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[pdf_file] => publications/A1/0057/20070057278.pdf
[firstpage_image] =>[orig_patent_app_number] => 11517559
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/517559 | Magnetic switching element and signal processing device using the same | Sep 7, 2006 | Abandoned |
Array
(
[id] => 76659
[patent_doc_number] => 07751274
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-06
[patent_title] => 'Extended synchronized clock'
[patent_app_type] => utility
[patent_app_number] => 11/516165
[patent_app_country] => US
[patent_app_date] => 2006-09-05
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[firstpage_image] =>[orig_patent_app_number] => 11516165
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/516165 | Extended synchronized clock | Sep 4, 2006 | Issued |
Array
(
[id] => 585909
[patent_doc_number] => 07460413
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Memory compiler redundancy'
[patent_app_type] => utility
[patent_app_number] => 11/468898
[patent_app_country] => US
[patent_app_date] => 2006-08-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/468898 | Memory compiler redundancy | Aug 30, 2006 | Issued |
Array
(
[id] => 4522106
[patent_doc_number] => 07911825
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-22
[patent_title] => 'Multi-port memory based on DRAM core'
[patent_app_type] => utility
[patent_app_number] => 11/512319
[patent_app_country] => US
[patent_app_date] => 2006-08-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/911/07911825.pdf
[firstpage_image] =>[orig_patent_app_number] => 11512319
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/512319 | Multi-port memory based on DRAM core | Aug 29, 2006 | Issued |
Array
(
[id] => 5147300
[patent_doc_number] => 20070047354
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[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Semiconductor module'
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[firstpage_image] =>[orig_patent_app_number] => 11511262
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/511262 | Semiconductor module | Aug 28, 2006 | Issued |
Array
(
[id] => 5145773
[patent_doc_number] => 20070045827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Semiconductor multi-chip package including two semiconductor memory chips having different memory densities'
[patent_app_type] => utility
[patent_app_number] => 11/508176
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[patent_app_date] => 2006-08-23
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[firstpage_image] =>[orig_patent_app_number] => 11508176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/508176 | Semiconductor multi-chip package including two semiconductor memory chips having different memory densities | Aug 22, 2006 | Issued |
Array
(
[id] => 5687087
[patent_doc_number] => 20060285402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-21
[patent_title] => 'APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY'
[patent_app_type] => utility
[patent_app_number] => 11/464253
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[patent_app_date] => 2006-08-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0285/20060285402.pdf
[firstpage_image] =>[orig_patent_app_number] => 11464253
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/464253 | Apparatus and methods for multi-level sensing in a memory array | Aug 13, 2006 | Issued |
Array
(
[id] => 257359
[patent_doc_number] => 07577039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Memory interface to bridge memory buses'
[patent_app_type] => utility
[patent_app_number] => 11/463822
[patent_app_country] => US
[patent_app_date] => 2006-08-10
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/577/07577039.pdf
[firstpage_image] =>[orig_patent_app_number] => 11463822
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/463822 | Memory interface to bridge memory buses | Aug 9, 2006 | Issued |
Array
(
[id] => 275285
[patent_doc_number] => 07561455
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-14
[patent_title] => 'Memory system using single wavelength optical transmission'
[patent_app_type] => utility
[patent_app_number] => 11/498175
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[pdf_file] => patents/07/561/07561455.pdf
[firstpage_image] =>[orig_patent_app_number] => 11498175
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/498175 | Memory system using single wavelength optical transmission | Aug 2, 2006 | Issued |
Array
(
[id] => 391197
[patent_doc_number] => 07301794
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-27
[patent_title] => 'Non-volatile memory array with simultaneous write and erase feature'
[patent_app_type] => utility
[patent_app_number] => 11/461939
[patent_app_country] => US
[patent_app_date] => 2006-08-02
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[pdf_file] => patents/07/301/07301794.pdf
[firstpage_image] =>[orig_patent_app_number] => 11461939
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/461939 | Non-volatile memory array with simultaneous write and erase feature | Aug 1, 2006 | Issued |
Array
(
[id] => 4655303
[patent_doc_number] => 20080024164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'Reconfigurable programmable logic device with P-channel non-volatile memory cells'
[patent_app_type] => utility
[patent_app_number] => 11/496254
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[pdf_file] => publications/A1/0024/20080024164.pdf
[firstpage_image] =>[orig_patent_app_number] => 11496254
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/496254 | Reconfigurable programmable logic device with P-channel non-volatile memory cells | Jul 30, 2006 | Abandoned |
Array
(
[id] => 5152444
[patent_doc_number] => 20070035326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'MEMORY CHIP AND METHOD FOR OPERATING A MEMORY CHIP'
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[patent_app_number] => 11/461380
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[firstpage_image] =>[orig_patent_app_number] => 11461380
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/461380 | Memory chip with settable termination resistance circuit | Jul 30, 2006 | Issued |
Array
(
[id] => 174764
[patent_doc_number] => 07660146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Ferroelectric recording medium'
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[firstpage_image] =>[orig_patent_app_number] => 11494505
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/494505 | Ferroelectric recording medium | Jul 27, 2006 | Issued |
Array
(
[id] => 924015
[patent_doc_number] => 07319621
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[patent_title] => 'Reducing DQ pin capacitance in a memory device'
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[pdf_file] => patents/07/319/07319621.pdf
[firstpage_image] =>[orig_patent_app_number] => 11493354
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/493354 | Reducing DQ pin capacitance in a memory device | Jul 25, 2006 | Issued |
Array
(
[id] => 5624082
[patent_doc_number] => 20060262587
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[patent_title] => 'Memory module and memory system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/492981 | Memory module and memory system | Jul 25, 2006 | Issued |
Array
(
[id] => 178993
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[firstpage_image] =>[orig_patent_app_number] => 11489475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/489475 | Multi-level operation in nitride storage memory cell | Jul 19, 2006 | Issued |
Array
(
[id] => 4993456
[patent_doc_number] => 20070008801
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[patent_title] => 'MEMORY CARD AND CONTROL CHIP CAPABLE OF SUPPORTING VARIOUS VOLTAGE SUPPLIES AND METHOD OF SUPPORTING VOLTAGES THEREOF'
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[firstpage_image] =>[orig_patent_app_number] => 11456235
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/456235 | Memory card and control chip capable of supporting various voltage supplies and method of supporting voltages thereof | Jul 9, 2006 | Issued |
Array
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[patent_title] => 'MEMORY DEVICE HAVING TERMINALS FOR TRANSFERRING MULTIPLE TYPES OF DATA'
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Array
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Array
(
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[patent_title] => 'Split gate flash memory cell with ballistic injection'
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[firstpage_image] =>[orig_patent_app_number] => 11477979
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/477979 | Split gate flash memory cell with ballistic injection | Jun 28, 2006 | Abandoned |