Search

Nduka E. Ojeh

Examiner (ID: 7878, Phone: (571)270-0291 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2892
Total Applications
873
Issued Applications
720
Pending Applications
98
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11096708 [patent_doc_number] => 20160293677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'ORGANIC EL DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/182150 [patent_app_country] => US [patent_app_date] => 2016-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6403 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15182150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/182150
Organic electroluminescent display device with an upper electrode in contact with a lower electrode Jun 13, 2016 Issued
Array ( [id] => 14920729 [patent_doc_number] => 10431692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Preparation methods for semiconductor layer and TFT, TFT and array substrate comprising semiconductor layer [patent_app_type] => utility [patent_app_number] => 15/533128 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5746 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15533128 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/533128
Preparation methods for semiconductor layer and TFT, TFT and array substrate comprising semiconductor layer May 19, 2016 Issued
Array ( [id] => 12739861 [patent_doc_number] => 20180138454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => GLASS SUBSTRATES COMPRISING RANDOM VOIDS AND DISPLAY DEVICES COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 15/553349 [patent_app_country] => US [patent_app_date] => 2016-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15553349 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/553349
GLASS SUBSTRATES COMPRISING RANDOM VOIDS AND DISPLAY DEVICES COMPRISING THE SAME Feb 23, 2016 Abandoned
15/041060 ADVANCED CHIP TO WAFER STACKING Feb 10, 2016 Abandoned
Array ( [id] => 14178165 [patent_doc_number] => 10263105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => High voltage semiconductor device [patent_app_type] => utility [patent_app_number] => 15/018161 [patent_app_country] => US [patent_app_date] => 2016-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 7355 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018161 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/018161
High voltage semiconductor device Feb 7, 2016 Issued
Array ( [id] => 10802710 [patent_doc_number] => 20160148867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'NANOSCALE INTERCONNECT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/012492 [patent_app_country] => US [patent_app_date] => 2016-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7345 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15012492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/012492
Nanoscale interconnect structure Jan 31, 2016 Issued
Array ( [id] => 14205319 [patent_doc_number] => 10269783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Implant structure for area reduction [patent_app_type] => utility [patent_app_number] => 15/004852 [patent_app_country] => US [patent_app_date] => 2016-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5447 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15004852 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/004852
Implant structure for area reduction Jan 21, 2016 Issued
Array ( [id] => 10809477 [patent_doc_number] => 20160155636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'DEPOSITION METHOD FOR PLANAR SURFACES' [patent_app_type] => utility [patent_app_number] => 14/956173 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956173 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956173
Deposition method for planar surfaces Nov 30, 2015 Issued
Array ( [id] => 11666731 [patent_doc_number] => 20170155450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'INTEGRATED CIRCUIT WITH CHIP-ON-CHIP AND CHIP-ON-SUBSTRATE CONFIGURATION' [patent_app_type] => utility [patent_app_number] => 14/956191 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6041 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956191 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956191
Integrated circuit with chip-on-chip and chip-on-substrate configuration Nov 30, 2015 Issued
Array ( [id] => 10826127 [patent_doc_number] => 20160172295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'Power FET Having Reduced Gate Resistance' [patent_app_type] => utility [patent_app_number] => 14/956186 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956186 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956186
Power FET Having Reduced Gate Resistance Nov 30, 2015 Abandoned
Array ( [id] => 11460072 [patent_doc_number] => 20170053978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH A CAPACITOR HAVING HIGH CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 14/955364 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4744 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14955364 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/955364
Semiconductor integrated circuit device with a capacitor having high capacitance Nov 30, 2015 Issued
Array ( [id] => 12936649 [patent_doc_number] => 09831451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Thin film transistor array substrate and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 14/956058 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956058 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956058
Thin film transistor array substrate and manufacturing method of the same Nov 30, 2015 Issued
Array ( [id] => 12202350 [patent_doc_number] => 09905420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-27 [patent_title] => 'Methods of forming silicon germanium tin films and structures and devices including the films' [patent_app_type] => utility [patent_app_number] => 14/956115 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956115
Methods of forming silicon germanium tin films and structures and devices including the films Nov 30, 2015 Issued
Array ( [id] => 13640975 [patent_doc_number] => 09847449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-19 [patent_title] => Nitride semiconductor light-emitting device with periodic gain active layers [patent_app_type] => utility [patent_app_number] => 14/955409 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6174 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14955409 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/955409
Nitride semiconductor light-emitting device with periodic gain active layers Nov 30, 2015 Issued
Array ( [id] => 10819559 [patent_doc_number] => 20160165723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'CIRCUIT BOARD, PACKAGE SUBSTRATE AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/955748 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8414 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14955748 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/955748
CIRCUIT BOARD, PACKAGE SUBSTRATE AND ELECTRONIC DEVICE Nov 30, 2015 Abandoned
Array ( [id] => 10809533 [patent_doc_number] => 20160155692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'SWITCHED POWER STAGE WITH INTEGRATED PASSIVE COMPONENTS' [patent_app_type] => utility [patent_app_number] => 14/956279 [patent_app_country] => US [patent_app_date] => 2015-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5453 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14956279 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/956279
SWITCHED POWER STAGE WITH INTEGRATED PASSIVE COMPONENTS Nov 30, 2015 Abandoned
Array ( [id] => 14205871 [patent_doc_number] => 10270064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Window for reducing visibility of an end portion of a polarizer, and display device comprising the same [patent_app_type] => utility [patent_app_number] => 14/938766 [patent_app_country] => US [patent_app_date] => 2015-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7199 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14938766 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/938766
Window for reducing visibility of an end portion of a polarizer, and display device comprising the same Nov 10, 2015 Issued
Array ( [id] => 11118310 [patent_doc_number] => 20160315284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/937766 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9877 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14937766 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/937766
Display device having crack prevention portion Nov 9, 2015 Issued
Array ( [id] => 10826442 [patent_doc_number] => 20160172610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'SINGLE-MOLECULE DIODES WITH HIGH ON/OFF RATIOS THROUGH ENVIRONMENTAL CONTROL' [patent_app_type] => utility [patent_app_number] => 14/937521 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5191 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14937521 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/937521
SINGLE-MOLECULE DIODES WITH HIGH ON/OFF RATIOS THROUGH ENVIRONMENTAL CONTROL Nov 9, 2015 Abandoned
Array ( [id] => 13019795 [patent_doc_number] => 10033017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Organic light emitting display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 14/936935 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13577 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14936935 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/936935
Organic light emitting display device and method of manufacturing the same Nov 9, 2015 Issued
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