![](/images/general/no_picture/200_user.png)
Neda Behrooz
Examiner (ID: 12377)
Most Active Art Unit | 2617 |
Art Unit(s) | 2617 |
Total Applications | 77 |
Issued Applications | 38 |
Pending Applications | 0 |
Abandoned Applications | 39 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6689838
[patent_doc_number] => 20030033564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-13
[patent_title] => 'Apparatus and method for processor power measurement in a digital signal processor using trace data and simulation techniques'
[patent_app_type] => new
[patent_app_number] => 09/924800
[patent_app_country] => US
[patent_app_date] => 2001-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2374
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20030033564.pdf
[firstpage_image] =>[orig_patent_app_number] => 09924800
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/924800 | Apparatus and method for processor power measurement in a digital signal processor using trace data and simulation techniques | Aug 7, 2001 | Issued |
Array
(
[id] => 1059038
[patent_doc_number] => 06857084
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-02-15
[patent_title] => 'Multiprocessor system and method for simultaneously placing all processors into debug mode'
[patent_app_type] => utility
[patent_app_number] => 09/922755
[patent_app_country] => US
[patent_app_date] => 2001-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5614
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/857/06857084.pdf
[firstpage_image] =>[orig_patent_app_number] => 09922755
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/922755 | Multiprocessor system and method for simultaneously placing all processors into debug mode | Aug 5, 2001 | Issued |
Array
(
[id] => 1109940
[patent_doc_number] => 06813732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-02
[patent_title] => 'Trace circuit'
[patent_app_type] => B2
[patent_app_number] => 09/920930
[patent_app_country] => US
[patent_app_date] => 2001-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4543
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/813/06813732.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920930
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920930 | Trace circuit | Aug 2, 2001 | Issued |
Array
(
[id] => 1055858
[patent_doc_number] => 06859893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-22
[patent_title] => 'Service guru system and method for automated proactive and reactive computer system analysis'
[patent_app_type] => utility
[patent_app_number] => 09/920531
[patent_app_country] => US
[patent_app_date] => 2001-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 9188
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/859/06859893.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920531
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920531 | Service guru system and method for automated proactive and reactive computer system analysis | Jul 31, 2001 | Issued |
Array
(
[id] => 6555880
[patent_doc_number] => 20020194511
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Apparatus and method for central processing unit power measurement in a digital signal processor'
[patent_app_type] => new
[patent_app_number] => 09/920193
[patent_app_country] => US
[patent_app_date] => 2001-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1685
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0194/20020194511.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920193
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920193 | Apparatus and method for central processing unit power measurement in a digital signal processor | Jul 31, 2001 | Abandoned |
Array
(
[id] => 7642346
[patent_doc_number] => 06430700
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'System and method for fault recovery for a two line bi-directional ring network'
[patent_app_type] => B1
[patent_app_number] => 09/910467
[patent_app_country] => US
[patent_app_date] => 2001-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 6166
[patent_no_of_claims] => 56
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 14
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/430/06430700.pdf
[firstpage_image] =>[orig_patent_app_number] => 09910467
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/910467 | System and method for fault recovery for a two line bi-directional ring network | Jul 18, 2001 | Issued |
Array
(
[id] => 6775591
[patent_doc_number] => 20030018929
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-23
[patent_title] => 'Integrated real-time data tracing with low pin count output'
[patent_app_type] => new
[patent_app_number] => 09/907387
[patent_app_country] => US
[patent_app_date] => 2001-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6658
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20030018929.pdf
[firstpage_image] =>[orig_patent_app_number] => 09907387
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/907387 | Integrated real-time data tracing with low pin count output | Jul 16, 2001 | Issued |
Array
(
[id] => 6656423
[patent_doc_number] => 20030009711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-09
[patent_title] => 'Alarm management system'
[patent_app_type] => new
[patent_app_number] => 09/894433
[patent_app_country] => US
[patent_app_date] => 2001-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7160
[patent_no_of_claims] => 73
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0009/20030009711.pdf
[firstpage_image] =>[orig_patent_app_number] => 09894433
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/894433 | Alarm management system | Jun 27, 2001 | Abandoned |
Array
(
[id] => 6757592
[patent_doc_number] => 20030005369
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'System and method for diagnosing printer problems and notarizing prints by evaluating embedded data'
[patent_app_type] => new
[patent_app_number] => 09/892397
[patent_app_country] => US
[patent_app_date] => 2001-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2693
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0005/20030005369.pdf
[firstpage_image] =>[orig_patent_app_number] => 09892397
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/892397 | System and method for diagnosing printer problems and notarizing prints by evaluating embedded data | Jun 26, 2001 | Issued |
Array
(
[id] => 6988803
[patent_doc_number] => 20010037477
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Enhanced embedded logic analyzer'
[patent_app_type] => new
[patent_app_number] => 09/887918
[patent_app_country] => US
[patent_app_date] => 2001-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 18902
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0037/20010037477.pdf
[firstpage_image] =>[orig_patent_app_number] => 09887918
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/887918 | Enhanced embedded logic analyzer | Jun 20, 2001 | Issued |
Array
(
[id] => 5971649
[patent_doc_number] => 20020091970
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-11
[patent_title] => 'Communication control system'
[patent_app_type] => new
[patent_app_number] => 09/881948
[patent_app_country] => US
[patent_app_date] => 2001-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6386
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20020091970.pdf
[firstpage_image] =>[orig_patent_app_number] => 09881948
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/881948 | Communication control system | Jun 14, 2001 | Issued |
Array
(
[id] => 1052632
[patent_doc_number] => 06862690
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-01
[patent_title] => 'Hierarchical recovery method for fibre-channel devices'
[patent_app_type] => utility
[patent_app_number] => 09/882707
[patent_app_country] => US
[patent_app_date] => 2001-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9449
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/862/06862690.pdf
[firstpage_image] =>[orig_patent_app_number] => 09882707
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/882707 | Hierarchical recovery method for fibre-channel devices | Jun 14, 2001 | Issued |
Array
(
[id] => 786110
[patent_doc_number] => 06993677
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-01-31
[patent_title] => 'System and method for data verification in a RAID system'
[patent_app_type] => utility
[patent_app_number] => 09/881584
[patent_app_country] => US
[patent_app_date] => 2001-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3059
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/993/06993677.pdf
[firstpage_image] =>[orig_patent_app_number] => 09881584
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/881584 | System and method for data verification in a RAID system | Jun 13, 2001 | Issued |
Array
(
[id] => 6265472
[patent_doc_number] => 20020188836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Fault resistant operating system'
[patent_app_type] => new
[patent_app_number] => 09/881007
[patent_app_country] => US
[patent_app_date] => 2001-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3929
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20020188836.pdf
[firstpage_image] =>[orig_patent_app_number] => 09881007
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/881007 | Fault resistant operating system | Jun 11, 2001 | Issued |
Array
(
[id] => 1097498
[patent_doc_number] => 06826717
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-30
[patent_title] => 'Synchronization of hardware and software debuggers'
[patent_app_type] => B1
[patent_app_number] => 09/880692
[patent_app_country] => US
[patent_app_date] => 2001-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 12514
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/826/06826717.pdf
[firstpage_image] =>[orig_patent_app_number] => 09880692
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/880692 | Synchronization of hardware and software debuggers | Jun 11, 2001 | Issued |
Array
(
[id] => 7016210
[patent_doc_number] => 20010052090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-13
[patent_title] => 'Storage device having an error correction function'
[patent_app_type] => new
[patent_app_number] => 09/878053
[patent_app_country] => US
[patent_app_date] => 2001-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3029
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20010052090.pdf
[firstpage_image] =>[orig_patent_app_number] => 09878053
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/878053 | Storage device having an error correction function | Jun 7, 2001 | Abandoned |
Array
(
[id] => 7618396
[patent_doc_number] => 06944797
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-09-13
[patent_title] => 'Method and system for tracing'
[patent_app_type] => utility
[patent_app_number] => 09/876689
[patent_app_country] => US
[patent_app_date] => 2001-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4011
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/944/06944797.pdf
[firstpage_image] =>[orig_patent_app_number] => 09876689
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/876689 | Method and system for tracing | Jun 6, 2001 | Issued |
Array
(
[id] => 6883329
[patent_doc_number] => 20010049801
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-06
[patent_title] => 'Dual-ported operator control panel with automatic failover'
[patent_app_type] => new
[patent_app_number] => 09/862904
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7380
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20010049801.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862904
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862904 | Dual-ported operator control panel with automatic failover | May 21, 2001 | Abandoned |
Array
(
[id] => 1466479
[patent_doc_number] => 06393587
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-21
[patent_title] => 'Deep trace memory system for a protocol analyzer'
[patent_app_type] => B1
[patent_app_number] => 09/848128
[patent_app_country] => US
[patent_app_date] => 2001-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5656
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/393/06393587.pdf
[firstpage_image] =>[orig_patent_app_number] => 09848128
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/848128 | Deep trace memory system for a protocol analyzer | May 2, 2001 | Issued |
Array
(
[id] => 1218299
[patent_doc_number] => 06711700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-23
[patent_title] => 'Method and apparatus to monitor the run state of a multi-partitioned computer system'
[patent_app_type] => B2
[patent_app_number] => 09/840345
[patent_app_country] => US
[patent_app_date] => 2001-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3400
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/711/06711700.pdf
[firstpage_image] =>[orig_patent_app_number] => 09840345
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840345 | Method and apparatus to monitor the run state of a multi-partitioned computer system | Apr 22, 2001 | Issued |