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Neda Behrooz

Examiner (ID: 12377)

Most Active Art Unit
2617
Art Unit(s)
2617
Total Applications
77
Issued Applications
38
Pending Applications
0
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1221816 [patent_doc_number] => 06708284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method and apparatus for improving reliability in microprocessors' [patent_app_type] => B2 [patent_app_number] => 09/820703 [patent_app_country] => US [patent_app_date] => 2001-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4235 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/708/06708284.pdf [firstpage_image] =>[orig_patent_app_number] => 09820703 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/820703
Method and apparatus for improving reliability in microprocessors Mar 29, 2001 Issued
Array ( [id] => 6896755 [patent_doc_number] => 20010027545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Circuit and method, for storing data prior to and after determining failure' [patent_app_type] => new [patent_app_number] => 09/818785 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5235 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20010027545.pdf [firstpage_image] =>[orig_patent_app_number] => 09818785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/818785
Circuit and method, for storing data prior to and after determining failure Mar 27, 2001 Issued
Array ( [id] => 7029690 [patent_doc_number] => 20010014921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Control system using plural objects, a programming method therefor, and a peripheral devices control system' [patent_app_type] => new [patent_app_number] => 09/819217 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9426 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20010014921.pdf [firstpage_image] =>[orig_patent_app_number] => 09819217 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819217
Control system using plural objects, a programming method therefor, and a peripheral devices control system Mar 26, 2001 Issued
Array ( [id] => 5848523 [patent_doc_number] => 20020133745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Self-checking multi-threaded processor' [patent_app_type] => new [patent_app_number] => 09/812125 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3934 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20020133745.pdf [firstpage_image] =>[orig_patent_app_number] => 09812125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/812125
Self-checking multi-threaded processor Mar 18, 2001 Issued
Array ( [id] => 7642334 [patent_doc_number] => 06430712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method and apparatus for inter-domain alarm correlation' [patent_app_type] => B2 [patent_app_number] => 09/811748 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7663 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/430/06430712.pdf [firstpage_image] =>[orig_patent_app_number] => 09811748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/811748
Method and apparatus for inter-domain alarm correlation Mar 18, 2001 Issued
Array ( [id] => 7095141 [patent_doc_number] => 20010034859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Configurable debug system with wire list walking' [patent_app_type] => new [patent_app_number] => 09/798001 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12274 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20010034859.pdf [firstpage_image] =>[orig_patent_app_number] => 09798001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798001
Configurable debug system with wire list walking Mar 1, 2001 Issued
Array ( [id] => 1071026 [patent_doc_number] => 06845471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-18 [patent_title] => 'Apparatus for and method of action synchronization for software reproducibility' [patent_app_type] => utility [patent_app_number] => 09/797797 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4503 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/845/06845471.pdf [firstpage_image] =>[orig_patent_app_number] => 09797797 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/797797
Apparatus for and method of action synchronization for software reproducibility Mar 1, 2001 Issued
Array ( [id] => 1186451 [patent_doc_number] => 06742145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Method of de-allocating multiple processor cores for an L2 correctable error' [patent_app_type] => B2 [patent_app_number] => 09/798161 [patent_app_country] => US [patent_app_date] => 2001-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3030 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/742/06742145.pdf [firstpage_image] =>[orig_patent_app_number] => 09798161 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798161
Method of de-allocating multiple processor cores for an L2 correctable error Feb 28, 2001 Issued
Array ( [id] => 1116715 [patent_doc_number] => 06804794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Error condition handling' [patent_app_type] => B1 [patent_app_number] => 09/796259 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7764 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804794.pdf [firstpage_image] =>[orig_patent_app_number] => 09796259 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796259
Error condition handling Feb 27, 2001 Issued
Array ( [id] => 6181218 [patent_doc_number] => 20020156954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Apparatus and methods for identifying bus protocol violations' [patent_app_type] => new [patent_app_number] => 09/796155 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6730 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20020156954.pdf [firstpage_image] =>[orig_patent_app_number] => 09796155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796155
Apparatus and methods for identifying bus protocol violations Feb 27, 2001 Issued
Array ( [id] => 1125020 [patent_doc_number] => 06799284 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-28 [patent_title] => 'Reparity bitmap RAID failure recovery' [patent_app_type] => B1 [patent_app_number] => 09/797007 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4445 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/799/06799284.pdf [firstpage_image] =>[orig_patent_app_number] => 09797007 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/797007
Reparity bitmap RAID failure recovery Feb 27, 2001 Issued
Array ( [id] => 7609994 [patent_doc_number] => 06842865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method and system for testing microprocessor based boards in a manufacturing environment' [patent_app_type] => utility [patent_app_number] => 09/797174 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9228 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/842/06842865.pdf [firstpage_image] =>[orig_patent_app_number] => 09797174 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/797174
Method and system for testing microprocessor based boards in a manufacturing environment Feb 26, 2001 Issued
Array ( [id] => 6889898 [patent_doc_number] => 20010025353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Method and device for analyzing data' [patent_app_type] => new [patent_app_number] => 09/795412 [patent_app_country] => US [patent_app_date] => 2001-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1961 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20010025353.pdf [firstpage_image] =>[orig_patent_app_number] => 09795412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/795412
Method and device for analyzing data Feb 26, 2001 Issued
Array ( [id] => 1097484 [patent_doc_number] => 06826711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'System and method for data protection with multidimensional parity' [patent_app_type] => B2 [patent_app_number] => 09/782613 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8343 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/826/06826711.pdf [firstpage_image] =>[orig_patent_app_number] => 09782613 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782613
System and method for data protection with multidimensional parity Feb 12, 2001 Issued
Array ( [id] => 6962904 [patent_doc_number] => 20010013103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Parity storage unit, in a disk array system, for generating updated parity data from received data records' [patent_app_type] => new [patent_app_number] => 09/781437 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11505 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013103.pdf [firstpage_image] =>[orig_patent_app_number] => 09781437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/781437
Parity storage unit, in a disk array system, for generating updated parity data from received data records Feb 12, 2001 Issued
Array ( [id] => 6020232 [patent_doc_number] => 20020104039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Method, system, program, and data structures for testing a network system including input/output devices' [patent_app_type] => new [patent_app_number] => 09/772626 [patent_app_country] => US [patent_app_date] => 2001-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7757 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20020104039.pdf [firstpage_image] =>[orig_patent_app_number] => 09772626 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772626
Method, system, program, and data structures for testing a network system including input/output devices Jan 29, 2001 Issued
Array ( [id] => 1143980 [patent_doc_number] => 06785835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Raid memory' [patent_app_type] => B2 [patent_app_number] => 09/769957 [patent_app_country] => US [patent_app_date] => 2001-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 14216 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785835.pdf [firstpage_image] =>[orig_patent_app_number] => 09769957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769957
Raid memory Jan 24, 2001 Issued
Array ( [id] => 6902247 [patent_doc_number] => 20010001156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-10 [patent_title] => 'Integrated network security access control system' [patent_app_type] => new-utility [patent_app_number] => 09/740295 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3560 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001156.pdf [firstpage_image] =>[orig_patent_app_number] => 09740295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740295
Integrated network security access control system Dec 18, 2000 Issued
Array ( [id] => 7080194 [patent_doc_number] => 20010042224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'Continuous flow compute point based data processing' [patent_app_type] => new [patent_app_number] => 09/731234 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8221 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20010042224.pdf [firstpage_image] =>[orig_patent_app_number] => 09731234 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731234
Continuous flow compute point based data processing Dec 4, 2000 Issued
Array ( [id] => 6875449 [patent_doc_number] => 20010000193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-04-05 [patent_title] => 'System and method for very fast IP packet filtering' [patent_app_type] => new-utility [patent_app_number] => 09/726203 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3546 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20010000193.pdf [firstpage_image] =>[orig_patent_app_number] => 09726203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726203
System and method for very fast IP packet filtering Nov 28, 2000 Issued
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