Search

Neda Behrooz

Examiner (ID: 12377)

Most Active Art Unit
2617
Art Unit(s)
2617
Total Applications
77
Issued Applications
38
Pending Applications
0
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
09/722321 Method and system for software and hardware multiplicity Nov 27, 2000 Abandoned
Array ( [id] => 1059036 [patent_doc_number] => 06857082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-15 [patent_title] => 'Method for providing a transition from one server to another server clustered together' [patent_app_type] => utility [patent_app_number] => 09/717929 [patent_app_country] => US [patent_app_date] => 2000-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4369 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857082.pdf [firstpage_image] =>[orig_patent_app_number] => 09717929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/717929
Method for providing a transition from one server to another server clustered together Nov 20, 2000 Issued
Array ( [id] => 1311653 [patent_doc_number] => 06625748 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Data reconstruction method and system wherein timing of data reconstruction is controlled in accordance with conditions when a failure occurs' [patent_app_type] => B1 [patent_app_number] => 09/712171 [patent_app_country] => US [patent_app_date] => 2000-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5903 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625748.pdf [firstpage_image] =>[orig_patent_app_number] => 09712171 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/712171
Data reconstruction method and system wherein timing of data reconstruction is controlled in accordance with conditions when a failure occurs Nov 14, 2000 Issued
Array ( [id] => 771493 [patent_doc_number] => 07010702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-07 [patent_title] => 'Architecture for virtual private networks' [patent_app_type] => utility [patent_app_number] => 09/710691 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4982 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/010/07010702.pdf [firstpage_image] =>[orig_patent_app_number] => 09710691 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710691
Architecture for virtual private networks Nov 8, 2000 Issued
Array ( [id] => 1234491 [patent_doc_number] => 06697966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Data bus for a plurality of nodes' [patent_app_type] => B1 [patent_app_number] => 09/623853 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 815 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697966.pdf [firstpage_image] =>[orig_patent_app_number] => 09623853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/623853
Data bus for a plurality of nodes Nov 7, 2000 Issued
Array ( [id] => 7622311 [patent_doc_number] => 06687855 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Apparatus and method for storing information during a test program' [patent_app_type] => B1 [patent_app_number] => 09/693218 [patent_app_country] => US [patent_app_date] => 2000-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687855.pdf [firstpage_image] =>[orig_patent_app_number] => 09693218 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693218
Apparatus and method for storing information during a test program Oct 19, 2000 Issued
Array ( [id] => 1234457 [patent_doc_number] => 06697962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Remote computer system monitoring and diagnostic board' [patent_app_type] => B1 [patent_app_number] => 09/692815 [patent_app_country] => US [patent_app_date] => 2000-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5517 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697962.pdf [firstpage_image] =>[orig_patent_app_number] => 09692815 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/692815
Remote computer system monitoring and diagnostic board Oct 19, 2000 Issued
Array ( [id] => 1134388 [patent_doc_number] => 06792561 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Apparatus and method for controlling access to expansion memory for a computer system' [patent_app_type] => B1 [patent_app_number] => 09/691025 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5006 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/792/06792561.pdf [firstpage_image] =>[orig_patent_app_number] => 09691025 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691025
Apparatus and method for controlling access to expansion memory for a computer system Oct 18, 2000 Issued
Array ( [id] => 1260601 [patent_doc_number] => 06668338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Dynamic shortcut to reverse autonomous computer program actions' [patent_app_type] => B1 [patent_app_number] => 09/692387 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3056 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668338.pdf [firstpage_image] =>[orig_patent_app_number] => 09692387 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/692387
Dynamic shortcut to reverse autonomous computer program actions Oct 18, 2000 Issued
Array ( [id] => 1049697 [patent_doc_number] => 06865693 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'System and method for debugging multiprocessor systems' [patent_app_type] => utility [patent_app_number] => 09/692647 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2659 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/865/06865693.pdf [firstpage_image] =>[orig_patent_app_number] => 09692647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/692647
System and method for debugging multiprocessor systems Oct 18, 2000 Issued
Array ( [id] => 1170400 [patent_doc_number] => 06766467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Method and apparatus for pausing a send queue without causing sympathy errors' [patent_app_type] => B1 [patent_app_number] => 09/692340 [patent_app_country] => US [patent_app_date] => 2000-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6506 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/766/06766467.pdf [firstpage_image] =>[orig_patent_app_number] => 09692340 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/692340
Method and apparatus for pausing a send queue without causing sympathy errors Oct 18, 2000 Issued
Array ( [id] => 1240958 [patent_doc_number] => 06691260 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Error propagation control method and device based on multi-level decision feedback equalization' [patent_app_type] => B1 [patent_app_number] => 09/691714 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 9205 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/691/06691260.pdf [firstpage_image] =>[orig_patent_app_number] => 09691714 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691714
Error propagation control method and device based on multi-level decision feedback equalization Oct 17, 2000 Issued
Array ( [id] => 7623785 [patent_doc_number] => 06725392 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Controller fault recovery system for a distributed file system' [patent_app_type] => B1 [patent_app_number] => 09/691579 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 16312 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725392.pdf [firstpage_image] =>[orig_patent_app_number] => 09691579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/691579
Controller fault recovery system for a distributed file system Oct 17, 2000 Issued
Array ( [id] => 1240930 [patent_doc_number] => 06691246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'System and method of processing partially defective memories' [patent_app_type] => B1 [patent_app_number] => 09/690327 [patent_app_country] => US [patent_app_date] => 2000-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8255 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/691/06691246.pdf [firstpage_image] =>[orig_patent_app_number] => 09690327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/690327
System and method of processing partially defective memories Oct 15, 2000 Issued
Array ( [id] => 7629947 [patent_doc_number] => 06636992 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method for renewing program code in an embedded micro-controller unit' [patent_app_type] => B1 [patent_app_number] => 09/688994 [patent_app_country] => US [patent_app_date] => 2000-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2081 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636992.pdf [firstpage_image] =>[orig_patent_app_number] => 09688994 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/688994
Method for renewing program code in an embedded micro-controller unit Oct 15, 2000 Issued
Array ( [id] => 1260613 [patent_doc_number] => 06668341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Storage cell with integrated soft error detection and correction' [patent_app_type] => B1 [patent_app_number] => 09/689968 [patent_app_country] => US [patent_app_date] => 2000-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668341.pdf [firstpage_image] =>[orig_patent_app_number] => 09689968 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689968
Storage cell with integrated soft error detection and correction Oct 11, 2000 Issued
Array ( [id] => 765463 [patent_doc_number] => 07017072 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Protection circuit for an access-arbitrated bus system network' [patent_app_type] => utility [patent_app_number] => 10/089650 [patent_app_country] => US [patent_app_date] => 2000-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4335 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/017/07017072.pdf [firstpage_image] =>[orig_patent_app_number] => 10089650 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/089650
Protection circuit for an access-arbitrated bus system network Sep 25, 2000 Issued
Array ( [id] => 1549762 [patent_doc_number] => 06374373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method for commissioning a bus system and a corresponding bus system' [patent_app_type] => B1 [patent_app_number] => 09/660351 [patent_app_country] => US [patent_app_date] => 2000-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6383 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374373.pdf [firstpage_image] =>[orig_patent_app_number] => 09660351 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/660351
Method for commissioning a bus system and a corresponding bus system Sep 11, 2000 Issued
Array ( [id] => 1258554 [patent_doc_number] => 06671822 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache' [patent_app_type] => B1 [patent_app_number] => 09/651948 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4364 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671822.pdf [firstpage_image] =>[orig_patent_app_number] => 09651948 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/651948
Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache Aug 30, 2000 Issued
Array ( [id] => 1197099 [patent_doc_number] => 06732289 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Fault tolerant data storage system' [patent_app_type] => B1 [patent_app_number] => 09/652972 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3995 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732289.pdf [firstpage_image] =>[orig_patent_app_number] => 09652972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652972
Fault tolerant data storage system Aug 30, 2000 Issued
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