Search

Neil Abrams

Examiner (ID: 6852, Phone: (571)272-2089 , Office: P/2831 )

Most Active Art Unit
3202
Art Unit(s)
2839, 2833, 2832, 3205, 2834, 2831, 3202, 1611
Total Applications
3845
Issued Applications
3190
Pending Applications
146
Abandoned Applications
527

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19964617 [patent_doc_number] => 12334132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Memory device and method for controlling row hammer [patent_app_type] => utility [patent_app_number] => 18/607520 [patent_app_country] => US [patent_app_date] => 2024-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4495 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607520
Memory device and method for controlling row hammer Mar 16, 2024 Issued
Array ( [id] => 19384341 [patent_doc_number] => 20240274211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => VOLTAGE DETECTION FOR MANAGED MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/583510 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583510
Voltage detection for managed memory systems Feb 20, 2024 Issued
Array ( [id] => 19796030 [patent_doc_number] => 12236995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Memory device, memory system having the same and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/426503 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18426503 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/426503
Memory device, memory system having the same and method of operating the same Jan 29, 2024 Issued
Array ( [id] => 19654261 [patent_doc_number] => 12176061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Programmable memory timing [patent_app_type] => utility [patent_app_number] => 18/420404 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/420404
Programmable memory timing Jan 22, 2024 Issued
Array ( [id] => 19900031 [patent_doc_number] => 12277963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Apparatus with data-rate-based voltage control mechanism and methods for operating the same [patent_app_type] => utility [patent_app_number] => 18/403516 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1088 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403516
Apparatus with data-rate-based voltage control mechanism and methods for operating the same Jan 2, 2024 Issued
Array ( [id] => 19093729 [patent_doc_number] => 11955193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-09 [patent_title] => Compute-in-memory array multi-range temperature compensation [patent_app_type] => utility [patent_app_number] => 18/529303 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 5559 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529303
Compute-in-memory array multi-range temperature compensation Dec 4, 2023 Issued
Array ( [id] => 19037803 [patent_doc_number] => 20240087618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => LOW POWER WAKE UP FOR MEMORY [patent_app_type] => utility [patent_app_number] => 18/518157 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518157 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518157
Low power wake up for memory Nov 21, 2023 Issued
Array ( [id] => 19812212 [patent_doc_number] => 12243621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Buffer control of multiple memory banks [patent_app_type] => utility [patent_app_number] => 18/516143 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516143
Buffer control of multiple memory banks Nov 20, 2023 Issued
Array ( [id] => 18958675 [patent_doc_number] => 20240047002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => ITERATIVE PROGRAMMING OF ANALOG CONTENT ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/483448 [patent_app_country] => US [patent_app_date] => 2023-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483448 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483448
Iterative programming of analog content addressable memory Oct 8, 2023 Issued
Array ( [id] => 18926810 [patent_doc_number] => 20240029814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 18/374026 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374026 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374026
Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device having the same Sep 27, 2023 Issued
Array ( [id] => 19376440 [patent_doc_number] => 12068018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Power mode wake-up for memory on different power domains [patent_app_type] => utility [patent_app_number] => 18/230461 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230461
Power mode wake-up for memory on different power domains Aug 3, 2023 Issued
Array ( [id] => 18865571 [patent_doc_number] => 20230420008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => MEMORY DEVICE AND ZQ CALIBRATION METHOD [patent_app_type] => utility [patent_app_number] => 18/364490 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 531 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364490
Memory device and ZQ calibration method Aug 2, 2023 Issued
Array ( [id] => 18789051 [patent_doc_number] => 20230377662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/228166 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228166 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228166
Semiconductor memory device Jul 30, 2023 Issued
Array ( [id] => 18696069 [patent_doc_number] => 20230326500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MEMORY DEVICE, SEMICONDUCTOR SYSTEM, AND DATA PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/333220 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333220
Memory device, semiconductor system, and data processing system Jun 11, 2023 Issued
Array ( [id] => 19610797 [patent_doc_number] => 12159677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Memory device which generates operation voltages in parallel with reception of an address [patent_app_type] => utility [patent_app_number] => 18/205915 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14315 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205915 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205915
Memory device which generates operation voltages in parallel with reception of an address Jun 4, 2023 Issued
Array ( [id] => 19670648 [patent_doc_number] => 12183415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 18/203717 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 26230 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203717 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/203717
Memory device May 30, 2023 Issued
Array ( [id] => 19205852 [patent_doc_number] => 20240177751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/323507 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323507 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323507
Storage device and operating method thereof May 24, 2023 Issued
Array ( [id] => 18865590 [patent_doc_number] => 20230420027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => MEMORY DEVICE AND REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/197084 [patent_app_country] => US [patent_app_date] => 2023-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197084 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197084
Memory device and refresh method thereof May 13, 2023 Issued
Array ( [id] => 18865612 [patent_doc_number] => 20230420049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => 3D MEMORY DEVICE INCLUDING SHARED SELECT GATE CONNECTIONS BETWEEN MEMORY BLOCKS [patent_app_type] => utility [patent_app_number] => 18/195147 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195147 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195147
3D memory device including shared select gate connections between memory blocks May 8, 2023 Issued
Array ( [id] => 18712544 [patent_doc_number] => 20230335177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MEMORY CONTROLLER WITH SKEW COMPENSATED DATA TRANSMIT TIMING [patent_app_type] => utility [patent_app_number] => 18/139176 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139176 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139176
MEMORY CONTROLLER WITH SKEW COMPENSATED DATA TRANSMIT TIMING Apr 24, 2023 Abandoned
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