Search

Neil Abrams

Examiner (ID: 6852, Phone: (571)272-2089 , Office: P/2831 )

Most Active Art Unit
3202
Art Unit(s)
2839, 2833, 2832, 3205, 2834, 2831, 3202, 1611
Total Applications
3845
Issued Applications
3190
Pending Applications
146
Abandoned Applications
527

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18520620 [patent_doc_number] => 11710514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Delay of self-refreshing at memory die [patent_app_type] => utility [patent_app_number] => 17/493501 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7192 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493501 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493501
Delay of self-refreshing at memory die Oct 3, 2021 Issued
Array ( [id] => 18623539 [patent_doc_number] => 11756592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Memory device supporting DBI interface and operating method of memory device [patent_app_type] => utility [patent_app_number] => 17/477931 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/477931
Memory device supporting DBI interface and operating method of memory device Sep 16, 2021 Issued
Array ( [id] => 18248809 [patent_doc_number] => 11605405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Power switching for embedded memory [patent_app_type] => utility [patent_app_number] => 17/468184 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468184
Power switching for embedded memory Sep 6, 2021 Issued
Array ( [id] => 19796075 [patent_doc_number] => 12237040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Method and apparatus to perform a read of a column in a memory accessible by row and/or by column [patent_app_type] => utility [patent_app_number] => 17/468210 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468210 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468210
Method and apparatus to perform a read of a column in a memory accessible by row and/or by column Sep 6, 2021 Issued
Array ( [id] => 18240190 [patent_doc_number] => 20230072501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => DUAL-ADDRESS COMMAND MANAGEMENT USING CONTENT ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 17/468044 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468044 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468044
Dual-address command management using content addressable memory Sep 6, 2021 Issued
Array ( [id] => 17463415 [patent_doc_number] => 20220076721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => MEMORY TOPOLOGIES [patent_app_type] => utility [patent_app_number] => 17/466961 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466961 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/466961
Memory topologies Sep 2, 2021 Issued
Array ( [id] => 18047702 [patent_doc_number] => 11521660 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Integrated circuit and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/463194 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463194
Integrated circuit and operation method thereof Aug 30, 2021 Issued
Array ( [id] => 18262933 [patent_doc_number] => 11610640 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-21 [patent_title] => Method for error correction coding with multiple hash groupings and device for performing the same [patent_app_type] => utility [patent_app_number] => 17/460359 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460359
Method for error correction coding with multiple hash groupings and device for performing the same Aug 29, 2021 Issued
Array ( [id] => 18248845 [patent_doc_number] => 11605441 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-14 [patent_title] => Memory systems having memory devices therein with enhanced error correction capability and methods of operating same [patent_app_type] => utility [patent_app_number] => 17/461380 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 29 [patent_no_of_words] => 9082 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461380 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461380
Memory systems having memory devices therein with enhanced error correction capability and methods of operating same Aug 29, 2021 Issued
Array ( [id] => 17932955 [patent_doc_number] => 20220328081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => CLOCK SIGNAL PROCESSING CIRCUIT, SEMICONDUCTOR APPARATUS, AND SEMICONDUCTOR SYSTEM [patent_app_type] => utility [patent_app_number] => 17/459704 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459704 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459704
Clock signal processing circuit, semiconductor apparatus, and semiconductor system Aug 26, 2021 Issued
Array ( [id] => 19488858 [patent_doc_number] => 12108601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Back gates and related apparatuses, systems, and methods [patent_app_type] => utility [patent_app_number] => 17/445867 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6463 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445867
Back gates and related apparatuses, systems, and methods Aug 24, 2021 Issued
Array ( [id] => 17277677 [patent_doc_number] => 20210383875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/407369 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407369 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407369
Memory device Aug 19, 2021 Issued
Array ( [id] => 17402665 [patent_doc_number] => 20220044756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => Read Model of Memory Cells using Information Generated during Read Operations [patent_app_type] => utility [patent_app_number] => 17/401213 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401213
Read model of memory cells using information generated during read operations Aug 11, 2021 Issued
Array ( [id] => 17615093 [patent_doc_number] => 20220157373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY SYSTEM PERFORMING HAMMER REFRESH OPERATION AND METHOD OF CONTROLLING REFRESH OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/399402 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399402 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/399402
Memory system performing hammer refresh operation and method of controlling refresh of memory device Aug 10, 2021 Issued
Array ( [id] => 17878375 [patent_doc_number] => 11450396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor memory devices and methods of operating semiconductor memory devices [patent_app_type] => utility [patent_app_number] => 17/398434 [patent_app_country] => US [patent_app_date] => 2021-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 10081 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17398434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/398434
Semiconductor memory devices and methods of operating semiconductor memory devices Aug 9, 2021 Issued
Array ( [id] => 18401923 [patent_doc_number] => 11664067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Memory system component that enables clock-to-strobe skew compensation [patent_app_type] => utility [patent_app_number] => 17/391521 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391521 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391521
Memory system component that enables clock-to-strobe skew compensation Aug 1, 2021 Issued
Array ( [id] => 18164035 [patent_doc_number] => 20230030630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR CHIP, METHOD OF FABRICATING THEREOF, AND METHOD OF TESTING A PLURALITY OF SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 17/389397 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389397
Semiconductor chip, method of fabricating thereof, and method of testing a plurality of semiconductor chips Jul 29, 2021 Issued
Array ( [id] => 17231974 [patent_doc_number] => 20210358531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => MEMORY AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/387588 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387588
Memory and electronic device Jul 27, 2021 Issued
Array ( [id] => 17231973 [patent_doc_number] => 20210358530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/382692 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382692 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382692
Semiconductor device, electronic component, and electronic device Jul 21, 2021 Issued
Array ( [id] => 18161334 [patent_doc_number] => 20230027926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DRIVER FOR NON-BINARY SIGNALING [patent_app_type] => utility [patent_app_number] => 17/381860 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381860
Driver for non-binary signaling Jul 20, 2021 Issued
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