Search

Neil Abrams

Examiner (ID: 6852, Phone: (571)272-2089 , Office: P/2831 )

Most Active Art Unit
3202
Art Unit(s)
2839, 2833, 2832, 3205, 2834, 2831, 3202, 1611
Total Applications
3845
Issued Applications
3190
Pending Applications
146
Abandoned Applications
527

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17699989 [patent_doc_number] => 11373721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-28 [patent_title] => Signal verification system [patent_app_type] => utility [patent_app_number] => 17/441219 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4098 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/441219
Signal verification system Jun 29, 2021 Issued
Array ( [id] => 18137107 [patent_doc_number] => 11562795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/363005 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 21389 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17363005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/363005
Semiconductor memory device Jun 29, 2021 Issued
Array ( [id] => 17925672 [patent_doc_number] => 11468931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Memory subsystem register clock driver clock teeing [patent_app_type] => utility [patent_app_number] => 17/360964 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17360964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/360964
Memory subsystem register clock driver clock teeing Jun 27, 2021 Issued
Array ( [id] => 17318510 [patent_doc_number] => 20210407560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => PSEUDO-ANALOG MEMORY COMPUTING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/355595 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355595
Pseudo-analog memory computing circuit Jun 22, 2021 Issued
Array ( [id] => 17682337 [patent_doc_number] => 11366589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-21 [patent_title] => Efficient method for improving memory bandwidth through read and restore decoupling using restore buffer [patent_app_type] => utility [patent_app_number] => 17/356376 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13150 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356376 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356376
Efficient method for improving memory bandwidth through read and restore decoupling using restore buffer Jun 22, 2021 Issued
Array ( [id] => 17173803 [patent_doc_number] => 20210327474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => CIRCUITS AND METHODS FOR IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 17/356211 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356211 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356211
Circuits and methods for in-memory computing Jun 22, 2021 Issued
Array ( [id] => 17699995 [patent_doc_number] => 11373727 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-28 [patent_title] => Apparatus for improving memory bandwidth through read and restore decoupling [patent_app_type] => utility [patent_app_number] => 17/351047 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351047
Apparatus for improving memory bandwidth through read and restore decoupling Jun 16, 2021 Issued
Array ( [id] => 17699996 [patent_doc_number] => 11373728 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-06-28 [patent_title] => Method for improving memory bandwidth through read and restore decoupling [patent_app_type] => utility [patent_app_number] => 17/351066 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13178 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351066 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351066
Method for improving memory bandwidth through read and restore decoupling Jun 16, 2021 Issued
Array ( [id] => 18174945 [patent_doc_number] => 11574662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Memory devices configured to generate pulse amplitude modulation-based DQ signals, memory controllers, and memory systems including the memory devices and the memory controllers [patent_app_type] => utility [patent_app_number] => 17/347998 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 9352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347998
Memory devices configured to generate pulse amplitude modulation-based DQ signals, memory controllers, and memory systems including the memory devices and the memory controllers Jun 14, 2021 Issued
Array ( [id] => 17115298 [patent_doc_number] => 20210295895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/342048 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342048 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342048
NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME Jun 7, 2021 Abandoned
Array ( [id] => 17978403 [patent_doc_number] => 11495275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Method for managing requests for access to random access memory and corresponding system [patent_app_type] => utility [patent_app_number] => 17/336841 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5451 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336841 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336841
Method for managing requests for access to random access memory and corresponding system Jun 1, 2021 Issued
Array ( [id] => 17862625 [patent_doc_number] => 11443786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Memory circuit including tracking circuit [patent_app_type] => utility [patent_app_number] => 17/326869 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326869
Memory circuit including tracking circuit May 20, 2021 Issued
Array ( [id] => 18024037 [patent_doc_number] => 20220375536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ANALOG CONTENT ADDRESSABLE MEMORY FOR STORING AND SEARCHING ARBITRARY SEGMENTS OF RANGES [patent_app_type] => utility [patent_app_number] => 17/326223 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326223 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326223
Analog content addressable memory for storing and searching arbitrary segments of ranges May 19, 2021 Issued
Array ( [id] => 17070418 [patent_doc_number] => 20210272635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => MEMORY DEVICES INCLUDING VOLTAGE GENERATION SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/321569 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/321569
Memory devices including voltage generation systems May 16, 2021 Issued
Array ( [id] => 17040407 [patent_doc_number] => 20210257043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => ADJUSTABLE COLUMN ADDRESS SCRAMBLE USING FUSES [patent_app_type] => utility [patent_app_number] => 17/308448 [patent_app_country] => US [patent_app_date] => 2021-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308448 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/308448
Adjustable column address scramble using fuses May 4, 2021 Issued
Array ( [id] => 17024057 [patent_doc_number] => 20210247928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => READ OPERATION CIRCUIT, SEMICONDUCTOR MEMORY, AND READ OPERATION METHOD [patent_app_type] => utility [patent_app_number] => 17/242258 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242258 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/242258
Read operation circuit, semiconductor memory, and read operation method Apr 26, 2021 Issued
Array ( [id] => 17941469 [patent_doc_number] => 11475928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Read operation circuit, semiconductor memory, and read operation method [patent_app_type] => utility [patent_app_number] => 17/242173 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7138 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/242173
Read operation circuit, semiconductor memory, and read operation method Apr 26, 2021 Issued
Array ( [id] => 18292151 [patent_doc_number] => 11621024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Calibration device [patent_app_type] => utility [patent_app_number] => 17/239709 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3514 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239709
Calibration device Apr 25, 2021 Issued
Array ( [id] => 17447861 [patent_doc_number] => 20220068366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => MEMORY DEVICE, A CONTROLLER FOR CONTROLLING THE SAME, A MEMORY SYSTEM INCLUDING THE SAME, AND A METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/239854 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239854
Memory device, a controller for controlling the same, a memory system including the same, and a method of operating the same Apr 25, 2021 Issued
Array ( [id] => 17772524 [patent_doc_number] => 11404476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Bipolar selector with independently tunable threshold voltages [patent_app_type] => utility [patent_app_number] => 17/230222 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 11058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/230222
Bipolar selector with independently tunable threshold voltages Apr 13, 2021 Issued
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