Search

Neil S Levy

Examiner (ID: 2793)

Most Active Art Unit
1615
Art Unit(s)
1502, 1615, 1617, 1616
Total Applications
2341
Issued Applications
1326
Pending Applications
298
Abandoned Applications
717

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6682267 [patent_doc_number] => 20030118131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Joint demodulation using a viterbi equalizer having an adaptive total number of states' [patent_app_type] => new [patent_app_number] => 10/037300 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5798 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20030118131.pdf [firstpage_image] =>[orig_patent_app_number] => 10037300 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/037300
Joint demodulation using a viterbi equalizer having an adaptive total number of states Dec 19, 2001 Issued
Array ( [id] => 6398309 [patent_doc_number] => 20020181612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Monolithic, software-definable circuit including a power amplifier and method for use therewith' [patent_app_type] => new [patent_app_number] => 09/865446 [patent_app_country] => US [patent_app_date] => 2001-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17212 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181612.pdf [firstpage_image] =>[orig_patent_app_number] => 09865446 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/865446
Monolithic, software-definable circuit including a power amplifier and method for use therewith May 28, 2001 Abandoned
Array ( [id] => 1209047 [patent_doc_number] => 06717993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Receiver' [patent_app_type] => B1 [patent_app_number] => 09/581556 [patent_app_country] => US [patent_app_date] => 2000-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 17407 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717993.pdf [firstpage_image] =>[orig_patent_app_number] => 09581556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/581556
Receiver Jul 13, 2000 Issued
Array ( [id] => 1247985 [patent_doc_number] => 06678338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Receiver module and receiver formed from several cascaded modules' [patent_app_type] => B1 [patent_app_number] => 09/538511 [patent_app_country] => US [patent_app_date] => 2000-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3766 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 494 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678338.pdf [firstpage_image] =>[orig_patent_app_number] => 09538511 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/538511
Receiver module and receiver formed from several cascaded modules Mar 29, 2000 Issued
Array ( [id] => 7622860 [patent_doc_number] => 06687306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Constellation adjustment based on detected encoding and encoding conversion for modem connections' [patent_app_type] => B1 [patent_app_number] => 09/527008 [patent_app_country] => US [patent_app_date] => 2000-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8568 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687306.pdf [firstpage_image] =>[orig_patent_app_number] => 09527008 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/527008
Constellation adjustment based on detected encoding and encoding conversion for modem connections Mar 15, 2000 Issued
Array ( [id] => 1269585 [patent_doc_number] => 06661853 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Method and apparatus for maximal-ratio combining of received frame data' [patent_app_type] => B1 [patent_app_number] => 09/524309 [patent_app_country] => US [patent_app_date] => 2000-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6084 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661853.pdf [firstpage_image] =>[orig_patent_app_number] => 09524309 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/524309
Method and apparatus for maximal-ratio combining of received frame data Mar 13, 2000 Issued
Array ( [id] => 1320537 [patent_doc_number] => 06614840 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Equalizer with phase-locked loop' [patent_app_type] => B1 [patent_app_number] => 09/525113 [patent_app_country] => US [patent_app_date] => 2000-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2941 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614840.pdf [firstpage_image] =>[orig_patent_app_number] => 09525113 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/525113
Equalizer with phase-locked loop Mar 13, 2000 Issued
Array ( [id] => 1286226 [patent_doc_number] => 06647056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Correlation circuit for spread spectrum communication, demodulation circuit and reception apparatus' [patent_app_type] => B1 [patent_app_number] => 09/512063 [patent_app_country] => US [patent_app_date] => 2000-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8076 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/647/06647056.pdf [firstpage_image] =>[orig_patent_app_number] => 09512063 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/512063
Correlation circuit for spread spectrum communication, demodulation circuit and reception apparatus Feb 23, 2000 Issued
Array ( [id] => 1199841 [patent_doc_number] => 06728322 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Sequential decoder, and receiver using sequential decoder' [patent_app_type] => B1 [patent_app_number] => 09/463409 [patent_app_country] => US [patent_app_date] => 2000-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7336 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728322.pdf [firstpage_image] =>[orig_patent_app_number] => 09463409 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/463409
Sequential decoder, and receiver using sequential decoder Feb 3, 2000 Issued
Array ( [id] => 1259266 [patent_doc_number] => 06668027 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Self adjusting automatic gain control (AGC) power reference level circuit' [patent_app_type] => B1 [patent_app_number] => 09/490612 [patent_app_country] => US [patent_app_date] => 2000-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4753 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668027.pdf [firstpage_image] =>[orig_patent_app_number] => 09490612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/490612
Self adjusting automatic gain control (AGC) power reference level circuit Jan 24, 2000 Issued
Array ( [id] => 1311584 [patent_doc_number] => 06621862 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Equalization for multichannel receiving node' [patent_app_type] => B1 [patent_app_number] => 09/477509 [patent_app_country] => US [patent_app_date] => 2000-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2566 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621862.pdf [firstpage_image] =>[orig_patent_app_number] => 09477509 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/477509
Equalization for multichannel receiving node Jan 3, 2000 Issued
Array ( [id] => 1307280 [patent_doc_number] => 06625207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Low power consumption data transmission circuit and method, and liquid crystal display apparatus using the same' [patent_app_type] => B1 [patent_app_number] => 09/408516 [patent_app_country] => US [patent_app_date] => 1999-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 33 [patent_no_of_words] => 14823 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 429 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625207.pdf [firstpage_image] =>[orig_patent_app_number] => 09408516 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/408516
Low power consumption data transmission circuit and method, and liquid crystal display apparatus using the same Sep 29, 1999 Issued
Array ( [id] => 1360045 [patent_doc_number] => 06580766 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Partial response maximum likelihood (PRML) bit detection apparatus' [patent_app_type] => B1 [patent_app_number] => 09/399609 [patent_app_country] => US [patent_app_date] => 1999-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6130 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580766.pdf [firstpage_image] =>[orig_patent_app_number] => 09399609 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/399609
Partial response maximum likelihood (PRML) bit detection apparatus Sep 19, 1999 Issued
Array ( [id] => 1335647 [patent_doc_number] => 06600788 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Narrow-band filter including sigma-delta modulator implemented in a programmable logic device' [patent_app_type] => B1 [patent_app_number] => 09/394123 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6637 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600788.pdf [firstpage_image] =>[orig_patent_app_number] => 09394123 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/394123
Narrow-band filter including sigma-delta modulator implemented in a programmable logic device Sep 9, 1999 Issued
Array ( [id] => 1242220 [patent_doc_number] => 06683914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'Method for convolutive encoding and transmission by packets of a digital data series flow, and corresponding decoding method device' [patent_app_type] => B1 [patent_app_number] => 09/362109 [patent_app_country] => US [patent_app_date] => 1999-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6767 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683914.pdf [firstpage_image] =>[orig_patent_app_number] => 09362109 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/362109
Method for convolutive encoding and transmission by packets of a digital data series flow, and corresponding decoding method device Jul 27, 1999 Issued
Array ( [id] => 1320678 [patent_doc_number] => 06614856 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Intermediary frequency input QPSK demodulator' [patent_app_type] => B1 [patent_app_number] => 09/340905 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2293 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614856.pdf [firstpage_image] =>[orig_patent_app_number] => 09340905 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340905
Intermediary frequency input QPSK demodulator Jun 27, 1999 Issued
Array ( [id] => 1249800 [patent_doc_number] => 06674824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method and circuitry for controlling a phase-locked loop by analog and digital signals' [patent_app_type] => B1 [patent_app_number] => 09/339704 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 4475 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 464 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674824.pdf [firstpage_image] =>[orig_patent_app_number] => 09339704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339704
Method and circuitry for controlling a phase-locked loop by analog and digital signals Jun 23, 1999 Issued
Array ( [id] => 1379126 [patent_doc_number] => 06570933 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Method in digital quadrature modulator and demodulator, and digital quadrature modulator and demodulator' [patent_app_type] => B1 [patent_app_number] => 09/308709 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4701 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570933.pdf [firstpage_image] =>[orig_patent_app_number] => 09308709 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/308709
Method in digital quadrature modulator and demodulator, and digital quadrature modulator and demodulator Jun 6, 1999 Issued
Array ( [id] => 1585942 [patent_doc_number] => 06424690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Two-thirds rate modulation and coding scheme for Rayleigh fading channels' [patent_app_type] => B1 [patent_app_number] => 09/281130 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2702 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424690.pdf [firstpage_image] =>[orig_patent_app_number] => 09281130 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/281130
Two-thirds rate modulation and coding scheme for Rayleigh fading channels Mar 28, 1999 Issued
Array ( [id] => 1378784 [patent_doc_number] => 06570912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Hybrid software/hardware discrete multi-tone transceiver' [patent_app_type] => B1 [patent_app_number] => 09/263160 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7806 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570912.pdf [firstpage_image] =>[orig_patent_app_number] => 09263160 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/263160
Hybrid software/hardware discrete multi-tone transceiver Mar 4, 1999 Issued
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