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Nelson Y. Garces

Examiner (ID: 3479)

Most Active Art Unit
2814
Art Unit(s)
2814
Total Applications
735
Issued Applications
549
Pending Applications
96
Abandoned Applications
118

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19486628 [patent_doc_number] => 20240334670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => Non-Interleaving N-Well And P-Well Pickup Region Design For Ic Devices [patent_app_type] => utility [patent_app_number] => 18/741463 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741463
Non-interleaving N-well and P-well pickup region design for IC devices Jun 11, 2024 Issued
Array ( [id] => 20307105 [patent_doc_number] => 12453116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Transistors with stacked channels and the methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/734635 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 63 [patent_no_of_words] => 4116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734635
Transistors with stacked channels and the methods of forming the same Jun 4, 2024 Issued
Array ( [id] => 19452883 [patent_doc_number] => 20240313013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SOLID-STATE IMAGING ELEMENT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/676161 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676161 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676161
SOLID-STATE IMAGING ELEMENT AND MANUFACTURING METHOD THEREOF May 27, 2024 Issued
Array ( [id] => 20483967 [patent_doc_number] => 12532446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Fin-based well straps for improving memory macro performance [patent_app_type] => utility [patent_app_number] => 18/608045 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 67 [patent_no_of_words] => 11776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608045 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608045
Fin-based well straps for improving memory macro performance Mar 17, 2024 Issued
Array ( [id] => 19251429 [patent_doc_number] => 20240202420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => INTEGRATED CIRCUIT WITH DUMMY BOUNDARY CELLS [patent_app_type] => utility [patent_app_number] => 18/589569 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/589569
INTEGRATED CIRCUIT WITH DUMMY BOUNDARY CELLS Feb 27, 2024 Pending
Array ( [id] => 20198511 [patent_doc_number] => 20250275221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => AIR-GAP IN TRENCH FIELD PLATE POWER MOSFET FOR REDUCED POWER LOSS PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/590785 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590785
AIR-GAP IN TRENCH FIELD PLATE POWER MOSFET FOR REDUCED POWER LOSS PERFORMANCE Feb 27, 2024 Pending
Array ( [id] => 20161372 [patent_doc_number] => 12388007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Capacitor networks for harmonic control in power devices [patent_app_type] => utility [patent_app_number] => 18/582162 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 1126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582162
Capacitor networks for harmonic control in power devices Feb 19, 2024 Issued
Array ( [id] => 19422387 [patent_doc_number] => 20240298511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => MASK ASSEMBLY AND METHOD OF MANUFACTURING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/443670 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443670
MASK ASSEMBLY AND METHOD OF MANUFACTURING DISPLAY APPARATUS Feb 15, 2024 Pending
Array ( [id] => 20182345 [patent_doc_number] => 20250266303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/443616 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443616
DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF Feb 15, 2024 Pending
Array ( [id] => 19502140 [patent_doc_number] => 20240341158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/443610 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443610 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443610
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Feb 15, 2024 Pending
Array ( [id] => 19790213 [patent_doc_number] => 20250063892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/435828 [patent_app_country] => US [patent_app_date] => 2024-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435828 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/435828
DISPLAY DEVICE Feb 6, 2024 Pending
Array ( [id] => 20153351 [patent_doc_number] => 20250253189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 18/430868 [patent_app_country] => US [patent_app_date] => 2024-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430868 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/430868
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FABRICATING SAME Feb 1, 2024 Pending
Array ( [id] => 19621477 [patent_doc_number] => 20240407157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/425318 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18425318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/425318
SEMICONDUCTOR DEVICE Jan 28, 2024 Pending
Array ( [id] => 19484415 [patent_doc_number] => 20240332457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/422572 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422572 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/422572
DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE Jan 24, 2024 Pending
Array ( [id] => 19591838 [patent_doc_number] => 20240389395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/421611 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421611 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421611
DISPLAY DEVICE Jan 23, 2024 Pending
Array ( [id] => 19500559 [patent_doc_number] => 20240339577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD FOR SAME [patent_app_type] => utility [patent_app_number] => 18/419132 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419132
DISPLAY DEVICE AND MANUFACTURING METHOD FOR SAME Jan 21, 2024 Pending
Array ( [id] => 19589898 [patent_doc_number] => 20240387455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/416845 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416845 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416845
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Jan 17, 2024 Pending
Array ( [id] => 20104580 [patent_doc_number] => 20250234516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR STRUCTURE INCLUDING POLYSILICON AS BOTTOM LAYER OF BIT LINE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/413376 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413376
SEMICONDUCTOR STRUCTURE INCLUDING POLYSILICON AS BOTTOM LAYER OF BIT LINE STRUCTURE AND METHOD OF MANUFACTURING THE SAME Jan 15, 2024 Pending
Array ( [id] => 19206422 [patent_doc_number] => 20240178321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => Fin Field-Effect Transistor Device with Composite Liner for the Fin [patent_app_type] => utility [patent_app_number] => 18/413716 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413716
Fin field-effect transistor device with composite liner for the fin Jan 15, 2024 Issued
Array ( [id] => 20103176 [patent_doc_number] => 20250233112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/413062 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413062
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Jan 15, 2024 Pending
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