Nelson Y. Garces

Array ( [id] => 18743519 [patent_doc_number] => 20230352507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => TRANSPARENT REFRACTION STRUCTURE FOR AN IMAGE SENSOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/349437 [patent_app_country] => US [patent_app_date] => 2023-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18349437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19966741 [patent_doc_number] => 12336280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Split stack triple height cell [patent_app_type] => utility [patent_app_number] => 18/348430 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 2325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19966741 [patent_doc_number] => 12336280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Split stack triple height cell [patent_app_type] => utility [patent_app_number] => 18/348430 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 2325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19926257 [patent_doc_number] => 12300550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Complementary MOS FETS vertically arranged and including multiple dielectric layers surrounding the MOS FETS [patent_app_type] => utility [patent_app_number] => 18/213758 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 112 [patent_no_of_words] => 4351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19926257 [patent_doc_number] => 12300550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Complementary MOS FETS vertically arranged and including multiple dielectric layers surrounding the MOS FETS [patent_app_type] => utility [patent_app_number] => 18/213758 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 112 [patent_no_of_words] => 4351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18961125 [patent_doc_number] => 20240049452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/204548 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19619342 [patent_doc_number] => 20240405022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => NON-PLANAR TRANSISTOR STRUCTURES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/204081 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19619342 [patent_doc_number] => 20240405022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => NON-PLANAR TRANSISTOR STRUCTURES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/204081 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19604942 [patent_doc_number] => 20240395822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => BACKSIDES SUBTRACTIVE M1 PATTERNING WITH BACKSIDE CONTACT REPAIR FOR TIGHT N2P SPACE [patent_app_type] => utility [patent_app_number] => 18/322620 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19604942 [patent_doc_number] => 20240395822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => BACKSIDES SUBTRACTIVE M1 PATTERNING WITH BACKSIDE CONTACT REPAIR FOR TIGHT N2P SPACE [patent_app_type] => utility [patent_app_number] => 18/322620 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19605052 [patent_doc_number] => 20240395932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => WRAPAROUND GATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/322212 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19191412 [patent_doc_number] => 20240170325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => METHOD FOR FABRICATING A PATTERNED FD-SOI WAFER [patent_app_type] => utility [patent_app_number] => 18/200688 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18200688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20305392 [patent_doc_number] => 12451391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Image sensor with dual trench isolation structure [patent_app_type] => utility [patent_app_number] => 18/320523 [patent_app_country] => US [patent_app_date] => 2023-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 3165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20305392 [patent_doc_number] => 12451391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Image sensor with dual trench isolation structure [patent_app_type] => utility [patent_app_number] => 18/320523 [patent_app_country] => US [patent_app_date] => 2023-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 3165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18696561 [patent_doc_number] => 20230327001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MANUFACTURING METHOD OF PILLAR-SHAPED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/319716 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18812820 [patent_doc_number] => 20230387157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => PHOTOELECTRIC CONVERSION DEVICE, MANUFACTURING METHOD OF PHOTOELECTRIC CONVERSION DEVICE, IMAGING SYSTEM, MOVING UNIT, AND EQUIPMENT [patent_app_type] => utility [patent_app_number] => 18/318488 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18615907 [patent_doc_number] => 20230282646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => DIFFERENT DIFFUSION BREAK STRUCTURES FOR THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/316005 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18615907 [patent_doc_number] => 20230282646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => DIFFERENT DIFFUSION BREAK STRUCTURES FOR THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/316005 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18615907 [patent_doc_number] => 20230282646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => DIFFERENT DIFFUSION BREAK STRUCTURES FOR THREE-DIMENSIONAL STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/316005 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19597008 [patent_doc_number] => 12154862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => System and method for aligned stitching [patent_app_type] => utility [patent_app_number] => 18/310743 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 35 [patent_no_of_words] => 9844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310743 [rel_patent_id] =>[rel_patent_doc_number] =>)