Search

Nema O. Berezny

Examiner (ID: 9201)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
286
Issued Applications
250
Pending Applications
5
Abandoned Applications
31

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1202728 [patent_doc_number] => 06720257 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'Bump with basic metallization and method for manufacturing the basic metallization' [patent_app_type] => B1 [patent_app_number] => 09/937955 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720257.pdf [firstpage_image] =>[orig_patent_app_number] => 09937955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/937955
Bump with basic metallization and method for manufacturing the basic metallization Sep 27, 2001 Issued
Array ( [id] => 6778330 [patent_doc_number] => 20030049411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'No-flow underfill material and underfill method for flip chip devices' [patent_app_type] => new [patent_app_number] => 09/949556 [patent_app_country] => US [patent_app_date] => 2001-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20030049411.pdf [firstpage_image] =>[orig_patent_app_number] => 09949556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/949556
No-flow underfill material and underfill method for flip chip devices Sep 9, 2001 Issued
Array ( [id] => 1165084 [patent_doc_number] => 06756251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Method of manufacturing microelectronic devices, including methods of underfilling microelectronic components through an underfill aperture' [patent_app_type] => B2 [patent_app_number] => 09/944465 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 8280 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756251.pdf [firstpage_image] =>[orig_patent_app_number] => 09944465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/944465
Method of manufacturing microelectronic devices, including methods of underfilling microelectronic components through an underfill aperture Aug 29, 2001 Issued
Array ( [id] => 6476712 [patent_doc_number] => 20020024126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Integrated circuit, casting mold for producing an integrated module, method of producing an integrated circuit, and method of testing an integrated circuit' [patent_app_type] => new [patent_app_number] => 09/940089 [patent_app_country] => US [patent_app_date] => 2001-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3611 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024126.pdf [firstpage_image] =>[orig_patent_app_number] => 09940089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/940089
Integrated circuit, casting mold for producing an integrated module, method of producing an integrated circuit, and method of testing an integrated circuit Aug 26, 2001 Abandoned
Array ( [id] => 6016143 [patent_doc_number] => 20020102745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Process for modifying chip assembly substrates' [patent_app_type] => new [patent_app_number] => 09/921346 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4753 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20020102745.pdf [firstpage_image] =>[orig_patent_app_number] => 09921346 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/921346
Process for modifying chip assembly substrates Aug 1, 2001 Abandoned
Array ( [id] => 1345820 [patent_doc_number] => 06582979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-24 [patent_title] => 'Structure and method for fabrication of a leadless chip carrier with embedded antenna' [patent_app_type] => B2 [patent_app_number] => 09/916666 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11198 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/582/06582979.pdf [firstpage_image] =>[orig_patent_app_number] => 09916666 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/916666
Structure and method for fabrication of a leadless chip carrier with embedded antenna Jul 25, 2001 Issued
Array ( [id] => 1341165 [patent_doc_number] => 06586277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Method and structure for manufacturing improved yield semiconductor packaged devices' [patent_app_type] => B2 [patent_app_number] => 09/681839 [patent_app_country] => US [patent_app_date] => 2001-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3168 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586277.pdf [firstpage_image] =>[orig_patent_app_number] => 09681839 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/681839
Method and structure for manufacturing improved yield semiconductor packaged devices Jul 25, 2001 Issued
Array ( [id] => 6884913 [patent_doc_number] => 20010039075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Method for Capacitively Coupling Electronic Devices' [patent_app_type] => new [patent_app_number] => 09/908016 [patent_app_country] => US [patent_app_date] => 2001-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1871 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20010039075.pdf [firstpage_image] =>[orig_patent_app_number] => 09908016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/908016
Method for capacitively coupling electronic devices Jul 16, 2001 Issued
Array ( [id] => 6473982 [patent_doc_number] => 20020022304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Semiconductor device, method for fabricating the same, circuit board and electronic device' [patent_app_type] => new [patent_app_number] => 09/893406 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3628 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20020022304.pdf [firstpage_image] =>[orig_patent_app_number] => 09893406 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/893406
System and method for fabricating a semiconductor device Jun 28, 2001 Issued
Array ( [id] => 6616099 [patent_doc_number] => 20020016022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-07 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 09/886035 [patent_app_country] => US [patent_app_date] => 2001-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10428 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20020016022.pdf [firstpage_image] =>[orig_patent_app_number] => 09886035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886035
Semiconductor device and manufacturing method thereof Jun 21, 2001 Abandoned
Array ( [id] => 6880261 [patent_doc_number] => 20010031548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Method for forming chip scale package' [patent_app_type] => new [patent_app_number] => 09/885846 [patent_app_country] => US [patent_app_date] => 2001-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5668 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031548.pdf [firstpage_image] =>[orig_patent_app_number] => 09885846 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/885846
Method for forming chip scale package Jun 19, 2001 Issued
Array ( [id] => 1494984 [patent_doc_number] => 06403460 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Method of making a semiconductor chip assembly' [patent_app_type] => B1 [patent_app_number] => 09/878522 [patent_app_country] => US [patent_app_date] => 2001-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 7333 [patent_no_of_claims] => 120 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403460.pdf [firstpage_image] =>[orig_patent_app_number] => 09878522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/878522
Method of making a semiconductor chip assembly Jun 10, 2001 Issued
Array ( [id] => 6921182 [patent_doc_number] => 20010028667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-11 [patent_title] => 'Surface-emitting laser and method of fabrication thereof' [patent_app_type] => new [patent_app_number] => 09/873236 [patent_app_country] => US [patent_app_date] => 2001-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4015 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20010028667.pdf [firstpage_image] =>[orig_patent_app_number] => 09873236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/873236
Surface-emitted laser and method of fabrication thereof Jun 4, 2001 Issued
Array ( [id] => 7634848 [patent_doc_number] => 06656770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Thermal enhancement approach using solder compositions in the liquid state' [patent_app_type] => B2 [patent_app_number] => 09/874826 [patent_app_country] => US [patent_app_date] => 2001-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6483 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/656/06656770.pdf [firstpage_image] =>[orig_patent_app_number] => 09874826 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/874826
Thermal enhancement approach using solder compositions in the liquid state Jun 4, 2001 Issued
Array ( [id] => 1534492 [patent_doc_number] => 06489186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-03 [patent_title] => 'Adhesion enhanced semiconductor die for mold compound packaging' [patent_app_type] => B2 [patent_app_number] => 09/873581 [patent_app_country] => US [patent_app_date] => 2001-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489186.pdf [firstpage_image] =>[orig_patent_app_number] => 09873581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/873581
Adhesion enhanced semiconductor die for mold compound packaging Jun 3, 2001 Issued
Array ( [id] => 1080437 [patent_doc_number] => 06835595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Semiconductor package, semiconductor device, electronic device, and method of manufacturing semiconductor package' [patent_app_type] => B1 [patent_app_number] => 09/744976 [patent_app_country] => US [patent_app_date] => 2001-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4746 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/835/06835595.pdf [firstpage_image] =>[orig_patent_app_number] => 09744976 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/744976
Semiconductor package, semiconductor device, electronic device, and method of manufacturing semiconductor package Jun 3, 2001 Issued
Array ( [id] => 1474413 [patent_doc_number] => 06387734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Semiconductor package, semiconductor device, electronic device and production method for semiconductor package' [patent_app_type] => B1 [patent_app_number] => 09/762681 [patent_app_country] => US [patent_app_date] => 2001-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6558 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387734.pdf [firstpage_image] =>[orig_patent_app_number] => 09762681 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/762681
Semiconductor package, semiconductor device, electronic device and production method for semiconductor package May 23, 2001 Issued
Array ( [id] => 1594274 [patent_doc_number] => 06383845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Stacked semiconductor device including improved lead frame arrangement' [patent_app_type] => B2 [patent_app_number] => 09/854626 [patent_app_country] => US [patent_app_date] => 2001-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 17117 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383845.pdf [firstpage_image] =>[orig_patent_app_number] => 09854626 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/854626
Stacked semiconductor device including improved lead frame arrangement May 14, 2001 Issued
Array ( [id] => 6539747 [patent_doc_number] => 20020137304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-26 [patent_title] => 'Method of reworking bump' [patent_app_type] => new [patent_app_number] => 09/853988 [patent_app_country] => US [patent_app_date] => 2001-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1691 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20020137304.pdf [firstpage_image] =>[orig_patent_app_number] => 09853988 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/853988
Method of reworking bump May 10, 2001 Abandoned
Array ( [id] => 5906549 [patent_doc_number] => 20020142494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method and system for fabricating contacts on semiconductor components' [patent_app_type] => new [patent_app_number] => 09/824125 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7598 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142494.pdf [firstpage_image] =>[orig_patent_app_number] => 09824125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824125
Method and system for fabricating contacts on semiconductor components Apr 1, 2001 Issued
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