
Nga Doan
Examiner (ID: 19180, Phone: (571)270-5356 , Office: P/2817 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2817, 2813, 4172 |
| Total Applications | 427 |
| Issued Applications | 310 |
| Pending Applications | 0 |
| Abandoned Applications | 119 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5010950
[patent_doc_number] => 20070281429
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/730805
[patent_app_country] => US
[patent_app_date] => 2007-04-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0281/20070281429.pdf
[firstpage_image] =>[orig_patent_app_number] => 11730805
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/730805 | Method for fabricating semiconductor device | Apr 3, 2007 | Abandoned |
Array
(
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[patent_doc_number] => 20090246022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-01
[patent_title] => 'FIRE FIGHTING PUMP AND ITS OPERATING METHODS'
[patent_app_type] => utility
[patent_app_number] => 12/374313
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[firstpage_image] =>[orig_patent_app_number] => 12374313
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/374313 | FIRE FIGHTING PUMP AND ITS OPERATING METHODS | Mar 13, 2007 | Abandoned |
Array
(
[id] => 5319801
[patent_doc_number] => 20090057791
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP'
[patent_app_type] => utility
[patent_app_number] => 12/281886
[patent_app_country] => US
[patent_app_date] => 2007-03-12
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[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/281886 | MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP | Mar 11, 2007 | Abandoned |
Array
(
[id] => 326573
[patent_doc_number] => 07514344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Lateral bipolar transistor'
[patent_app_type] => utility
[patent_app_number] => 11/682126
[patent_app_country] => US
[patent_app_date] => 2007-03-05
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11682126
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/682126 | Lateral bipolar transistor | Mar 4, 2007 | Issued |
Array
(
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[patent_issue_date] => 2008-08-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/679971 | BIPOLAR TRANSISTOR USING SELECTIVE DIELECTRIC DEPOSITION AND METHODS FOR FABRICATION THEREOF | Feb 27, 2007 | Abandoned |
Array
(
[id] => 4727416
[patent_doc_number] => 20080206960
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[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'REWORKABLE CHIP STACK'
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[patent_app_number] => 11/679226
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[firstpage_image] =>[orig_patent_app_number] => 11679226
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/679226 | REWORKABLE CHIP STACK | Feb 26, 2007 | Abandoned |
Array
(
[id] => 348819
[patent_doc_number] => 07494935
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Method for forming fine pattern of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/679176
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/679176 | Method for forming fine pattern of semiconductor device | Feb 25, 2007 | Issued |
Array
(
[id] => 4870600
[patent_doc_number] => 20080197334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-21
[patent_title] => 'Phase Change Memory Cell with Heater and Method for Fabricating the Same'
[patent_app_type] => utility
[patent_app_number] => 11/677416
[patent_app_country] => US
[patent_app_date] => 2007-02-21
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/677416 | Phase change memory cell with heater and method for fabricating the same | Feb 20, 2007 | Issued |
Array
(
[id] => 4870607
[patent_doc_number] => 20080197341
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[patent_issue_date] => 2008-08-21
[patent_title] => 'METHOD FOR MAKING A MULTIPLE-WAVELENGTH OPTO-ELECTRONIC DEVICE INCLUDING A SUPERLATTICE'
[patent_app_type] => utility
[patent_app_number] => 11/675846
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[firstpage_image] =>[orig_patent_app_number] => 11675846
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/675846 | Method for making a multiple-wavelength opto-electronic device including a superlattice | Feb 15, 2007 | Issued |
Array
(
[id] => 4870740
[patent_doc_number] => 20080197474
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[patent_kind] => A1
[patent_issue_date] => 2008-08-21
[patent_title] => 'Semiconductor device package with multi-chips and method of the same'
[patent_app_type] => utility
[patent_app_number] => 11/707042
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Array
(
[id] => 4870765
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[patent_title] => 'STRUCTURE FOR METAL CAP APPLICATIONS'
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Array
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Array
(
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Array
(
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[patent_title] => 'Stressed SOI FET having tensile and compressive device regions'
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/670362 | Method and structure for forming an integrated spatial light modulator | Jan 31, 2007 | Issued |
Array
(
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