Search

Nga Doan

Examiner (ID: 18754, Phone: (571)270-5356 , Office: P/2817 )

Most Active Art Unit
2813
Art Unit(s)
2813, 2817, 4172
Total Applications
427
Issued Applications
311
Pending Applications
0
Abandoned Applications
119

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9020274 [patent_doc_number] => 08530259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Method and structure for forming a gyroscope and accelerometer' [patent_app_type] => utility [patent_app_number] => 13/480351 [patent_app_country] => US [patent_app_date] => 2012-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 60 [patent_no_of_words] => 10426 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13480351 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/480351
Method and structure for forming a gyroscope and accelerometer May 23, 2012 Issued
Array ( [id] => 8390888 [patent_doc_number] => 20120228730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP' [patent_app_type] => utility [patent_app_number] => 13/476301 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5818 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476301 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476301
MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP May 20, 2012 Abandoned
Array ( [id] => 9245965 [patent_doc_number] => 08610250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Packaging substrate having embedded capacitors and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/458059 [patent_app_country] => US [patent_app_date] => 2012-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2803 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13458059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/458059
Packaging substrate having embedded capacitors and fabrication method thereof Apr 26, 2012 Issued
Array ( [id] => 9065054 [patent_doc_number] => 20130256810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'Semiconductor Device and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 13/512329 [patent_app_country] => US [patent_app_date] => 2012-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3458 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13512329 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/512329
Semiconductor Device and Method for Manufacturing the Same Apr 8, 2012 Abandoned
Array ( [id] => 9065040 [patent_doc_number] => 20130256796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'MOSFET WITH SLECTIVE DOPANT DEACTIVATION UNDERNEATH GATE' [patent_app_type] => utility [patent_app_number] => 13/434630 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3948 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13434630 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/434630
MOSFET with selective dopant deactivation underneath gate Mar 28, 2012 Issued
Array ( [id] => 8298509 [patent_doc_number] => 20120181071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'MULTILAYER PILLAR FOR REDUCED STRESS INTERCONNECT AND METHOD OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 13/431609 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431609 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/431609
Multilayer pillar for reduced stress interconnect and method of making same Mar 26, 2012 Issued
Array ( [id] => 8154747 [patent_doc_number] => 20120098053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/339134 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6676 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20120098053.pdf [firstpage_image] =>[orig_patent_app_number] => 13339134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339134
SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME Dec 27, 2011 Abandoned
Array ( [id] => 8159433 [patent_doc_number] => 20120100704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'SEMICONDUCTOR DEVICE WITH VERTICAL TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/339085 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6675 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100704.pdf [firstpage_image] =>[orig_patent_app_number] => 13339085 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339085
Semiconductor device with vertical transistor and method for fabricating the same Dec 27, 2011 Issued
Array ( [id] => 8563600 [patent_doc_number] => 20120326171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'LIGHT EMITTING DIODE HAVING ELECTRODE PADS' [patent_app_type] => utility [patent_app_number] => 13/330327 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7435 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330327 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330327
Light emitting diode having electrode pads Dec 18, 2011 Issued
Array ( [id] => 8139833 [patent_doc_number] => 20120094462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/330254 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7489 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20120094462.pdf [firstpage_image] =>[orig_patent_app_number] => 13330254 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330254
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Dec 18, 2011 Abandoned
Array ( [id] => 11861958 [patent_doc_number] => 09741647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Wiring substrate, semiconductor device, and method of manufacturing wiring substrate' [patent_app_type] => utility [patent_app_number] => 13/293857 [patent_app_country] => US [patent_app_date] => 2011-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 36 [patent_no_of_words] => 7095 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293857 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293857
Wiring substrate, semiconductor device, and method of manufacturing wiring substrate Nov 9, 2011 Issued
Array ( [id] => 11239901 [patent_doc_number] => 09466546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Semiconductor device and method of forming the same' [patent_app_type] => utility [patent_app_number] => 13/293769 [patent_app_country] => US [patent_app_date] => 2011-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6696 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293769 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293769
Semiconductor device and method of forming the same Nov 9, 2011 Issued
Array ( [id] => 8180240 [patent_doc_number] => 20120112351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'SEMICONDUCTOR DEVICE PACKAGING METHOD AND SEMICONDUCTOR DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/293016 [patent_app_country] => US [patent_app_date] => 2011-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3223 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112351.pdf [firstpage_image] =>[orig_patent_app_number] => 13293016 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/293016
SEMICONDUCTOR DEVICE PACKAGING METHOD AND SEMICONDUCTOR DEVICE PACKAGE Nov 8, 2011 Abandoned
Array ( [id] => 8812057 [patent_doc_number] => 20130113102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR INTERCONNECT STRUCTURE HAVING A GRAPHENE-BASED BARRIER METAL LAYER' [patent_app_type] => utility [patent_app_number] => 13/291470 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3800 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291470 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291470
Semiconductor interconnect structure having a graphene-based barrier metal layer Nov 7, 2011 Issued
Array ( [id] => 8193083 [patent_doc_number] => 20120119387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEMICONDUCTOR PACKAGE WITH BONDING WIRES OF REDUCED LOOP INDUCTANCE' [patent_app_type] => utility [patent_app_number] => 13/291740 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7633 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119387.pdf [firstpage_image] =>[orig_patent_app_number] => 13291740 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291740
Semiconductor package with bonding wires of reduced loop inductance Nov 7, 2011 Issued
Array ( [id] => 8299143 [patent_doc_number] => 20120181703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'PATTERNABLE ADHESIVE COMPOSITION, SEMICONDUCTOR PACKAGE USING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/291588 [patent_app_country] => US [patent_app_date] => 2011-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291588 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/291588
Patternable adhesive composition, semiconductor package using the same, and method of manufacturing semiconductor package Nov 7, 2011 Issued
Array ( [id] => 11898173 [patent_doc_number] => 09768114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/290379 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6475 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13290379 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/290379
Semiconductor device and method of manufacturing the same Nov 6, 2011 Issued
Array ( [id] => 8812028 [patent_doc_number] => 20130113073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'Integrated Circuit having a MOM Capacitor and Method of Making Same' [patent_app_type] => utility [patent_app_number] => 13/289666 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289666 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289666
Integrated circuit having a MOM capacitor and method of making same Nov 3, 2011 Issued
Array ( [id] => 8812005 [patent_doc_number] => 20130113050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'BLANKET SHORT CHANNEL ROLL-UP IMPLANT WITH NON-ANGLED LONG CHANNEL COMPENSATING IMPLANT THROUGH PATTERNED OPENING' [patent_app_type] => utility [patent_app_number] => 13/289051 [patent_app_country] => US [patent_app_date] => 2011-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13289051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/289051
Blanket short channel roll-up implant with non-angled long channel compensating implant through patterned opening Nov 3, 2011 Issued
Array ( [id] => 8154865 [patent_doc_number] => 20120098098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'STACKED ESD CLAMP WITH REDUCED VARIATION IN CLAMP VOLTAGE' [patent_app_type] => utility [patent_app_number] => 13/277939 [patent_app_country] => US [patent_app_date] => 2011-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20120098098.pdf [firstpage_image] =>[orig_patent_app_number] => 13277939 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/277939
Stacked ESD clamp with reduced variation in clamp voltage Oct 19, 2011 Issued
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