Search

Nga Doan

Examiner (ID: 18754, Phone: (571)270-5356 , Office: P/2817 )

Most Active Art Unit
2813
Art Unit(s)
2813, 2817, 4172
Total Applications
427
Issued Applications
311
Pending Applications
0
Abandoned Applications
119

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8760019 [patent_doc_number] => 08420540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Sub-lithographic printing method' [patent_app_type] => utility [patent_app_number] => 13/006412 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 4615 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13006412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/006412
Sub-lithographic printing method Jan 12, 2011 Issued
Array ( [id] => 5985796 [patent_doc_number] => 20110097895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'SEMICONDUCTOR DEVICES INCLUDING INTERLAYER CONDUCTIVE CONTACTS AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/984838 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20110097895.pdf [firstpage_image] =>[orig_patent_app_number] => 12984838 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984838
Semiconductor devices including interlayer conductive contacts and methods of forming the same Jan 4, 2011 Issued
Array ( [id] => 8237467 [patent_doc_number] => 20120146202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'Top exposed Package and Assembly Method' [patent_app_type] => utility [patent_app_number] => 12/968159 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6693 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12968159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/968159
Top exposed package and assembly method Dec 13, 2010 Issued
Array ( [id] => 7706673 [patent_doc_number] => 20120001328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'CHIP-SIZED PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/967844 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3585 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12967844 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/967844
CHIP-SIZED PACKAGE AND FABRICATION METHOD THEREOF Dec 13, 2010 Abandoned
Array ( [id] => 8802816 [patent_doc_number] => 08441091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Photosensor assembly and method for providing a photosensor assembly' [patent_app_type] => utility [patent_app_number] => 12/963854 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8916 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963854
Photosensor assembly and method for providing a photosensor assembly Dec 8, 2010 Issued
Array ( [id] => 6075102 [patent_doc_number] => 20110140160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'LIGHT EMITTING DIODE HAVING ELECTRODE PADS' [patent_app_type] => utility [patent_app_number] => 12/963921 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3624 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140160.pdf [firstpage_image] =>[orig_patent_app_number] => 12963921 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963921
Light emitting diode having electrode pads Dec 8, 2010 Issued
Array ( [id] => 8237460 [patent_doc_number] => 20120146182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'HIGH DENSITY THREE-DIMENSIONAL INTEGRATED CAPACITORS' [patent_app_type] => utility [patent_app_number] => 12/964049 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 20787 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964049 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964049
High density three-dimensional integrated capacitors Dec 8, 2010 Issued
Array ( [id] => 8981992 [patent_doc_number] => 08513106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Pseudo butted junction structure for back plane connection' [patent_app_type] => utility [patent_app_number] => 12/964082 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7085 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964082 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964082
Pseudo butted junction structure for back plane connection Dec 8, 2010 Issued
Array ( [id] => 8910036 [patent_doc_number] => 08482103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Nitride semiconductor template and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 12/963650 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3279 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963650
Nitride semiconductor template and fabricating method thereof Dec 8, 2010 Issued
Array ( [id] => 7571029 [patent_doc_number] => 20110266685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'Semiconductor Device Comprising Sophisticated Conductive Elements in a Dielectric Material System Formed by Using a Barrier Layer' [patent_app_type] => utility [patent_app_number] => 12/963707 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20110266685.pdf [firstpage_image] =>[orig_patent_app_number] => 12963707 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963707
Semiconductor Device Comprising Sophisticated Conductive Elements in a Dielectric Material System Formed by Using a Barrier Layer Dec 8, 2010 Abandoned
Array ( [id] => 9100210 [patent_doc_number] => 08564090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/963695 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 5785 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963695 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963695
Semiconductor device and method of manufacturing semiconductor device Dec 8, 2010 Issued
Array ( [id] => 8921443 [patent_doc_number] => 08487383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Flash memory device having triple well structure' [patent_app_type] => utility [patent_app_number] => 12/964003 [patent_app_country] => US [patent_app_date] => 2010-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12964003 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/964003
Flash memory device having triple well structure Dec 8, 2010 Issued
Array ( [id] => 9355947 [patent_doc_number] => 08674485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-18 [patent_title] => 'Semiconductor device including leadframe with downsets' [patent_app_type] => utility [patent_app_number] => 12/963431 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 9454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12963431 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/963431
Semiconductor device including leadframe with downsets Dec 7, 2010 Issued
Array ( [id] => 9286859 [patent_doc_number] => 08643190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Through substrate via including variable sidewall profile' [patent_app_type] => utility [patent_app_number] => 12/955429 [patent_app_country] => US [patent_app_date] => 2010-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5566 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12955429 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/955429
Through substrate via including variable sidewall profile Nov 28, 2010 Issued
Array ( [id] => 8846156 [patent_doc_number] => 08455335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/942367 [patent_app_country] => US [patent_app_date] => 2010-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 27 [patent_no_of_words] => 7630 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12942367 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/942367
Manufacturing method of semiconductor device Nov 8, 2010 Issued
Array ( [id] => 8555082 [patent_doc_number] => 08329554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Ultra thin bumped wafer with under-film' [patent_app_type] => utility [patent_app_number] => 12/916758 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3686 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12916758 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916758
Ultra thin bumped wafer with under-film Oct 31, 2010 Issued
Array ( [id] => 5925476 [patent_doc_number] => 20110037172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'Ultra Thin Bumped Wafer With Under-Film' [patent_app_type] => utility [patent_app_number] => 12/911592 [patent_app_country] => US [patent_app_date] => 2010-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3469 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037172.pdf [firstpage_image] =>[orig_patent_app_number] => 12911592 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/911592
Ultra thin bumped wafer with under-film Oct 24, 2010 Issued
Array ( [id] => 5953278 [patent_doc_number] => 20110033980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'STACK PACKAGE THAT PREVENTS WARPING AND CRACKING OF A WAFER AND SEMICONDUCTOR CHIP AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/908340 [patent_app_country] => US [patent_app_date] => 2010-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4255 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20110033980.pdf [firstpage_image] =>[orig_patent_app_number] => 12908340 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/908340
STACK PACKAGE THAT PREVENTS WARPING AND CRACKING OF A WAFER AND SEMICONDUCTOR CHIP AND METHOD FOR MANUFACTURING THE SAME Oct 19, 2010 Abandoned
Array ( [id] => 6193156 [patent_doc_number] => 20110024910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'METALLURGY FOR COPPER PLATED WAFERS' [patent_app_type] => utility [patent_app_number] => 12/904988 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3795 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20110024910.pdf [firstpage_image] =>[orig_patent_app_number] => 12904988 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904988
METALLURGY FOR COPPER PLATED WAFERS Oct 13, 2010 Abandoned
Array ( [id] => 5929423 [patent_doc_number] => 20110039382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/923555 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11485 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20110039382.pdf [firstpage_image] =>[orig_patent_app_number] => 12923555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923555
Semiconductor device and method for manufacturing the same Sep 27, 2010 Issued
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