Search

Ngan V Ngo

Examiner (ID: 11342, Phone: (571)272-1711 , Office: P/2819 )

Most Active Art Unit
2503
Art Unit(s)
2893, 2814, 2818, 2819, 2503, 2811
Total Applications
3475
Issued Applications
2898
Pending Applications
46
Abandoned Applications
536

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12168531 [patent_doc_number] => 09887303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Semiconductor device including two-dimensional material, and method of manufacturing the semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/971019 [patent_app_country] => US [patent_app_date] => 2015-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 50 [patent_no_of_words] => 19199 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14971019 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/971019
Semiconductor device including two-dimensional material, and method of manufacturing the semiconductor device Dec 15, 2015 Issued
Array ( [id] => 10747486 [patent_doc_number] => 20160093638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-31 [patent_title] => 'HIGH VOLTAGE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR INTEGRATED INTO EXTREMELY THIN SEMICONDUCTOR ON INSULATOR PROCESS' [patent_app_type] => utility [patent_app_number] => 14/958171 [patent_app_country] => US [patent_app_date] => 2015-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14958171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/958171
High voltage metal oxide semiconductor field effect transistor integrated into extremely thin semiconductor on insulator process Dec 2, 2015 Issued
Array ( [id] => 10809766 [patent_doc_number] => 20160155925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'METHOD OF FORMING A CMOS-BASED THERMOELECTRIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/957314 [patent_app_country] => US [patent_app_date] => 2015-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7592 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14957314 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/957314
Method of forming a CMOS-based thermoelectric device Dec 1, 2015 Issued
Array ( [id] => 10808022 [patent_doc_number] => 20160154180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'METHOD FOR MANUFACTURING A WAVEGUIDE INCLUDING A SEMI-CONDUCTING JUNCTION' [patent_app_type] => utility [patent_app_number] => 14/953773 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6065 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953773 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953773
Method for manufacturing a waveguide including a semi-conducting junction Nov 29, 2015 Issued
Array ( [id] => 11898085 [patent_doc_number] => 09768023 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Method for structuring a substrate' [patent_app_type] => utility [patent_app_number] => 14/953492 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 58 [patent_no_of_words] => 25733 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953492 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953492
Method for structuring a substrate Nov 29, 2015 Issued
Array ( [id] => 11551609 [patent_doc_number] => 09620466 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Method of manufacturing an electronic device having a contact pad with partially sealed pores' [patent_app_type] => utility [patent_app_number] => 14/953456 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 17123 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14953456 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/953456
Method of manufacturing an electronic device having a contact pad with partially sealed pores Nov 29, 2015 Issued
Array ( [id] => 11652780 [patent_doc_number] => 20170148681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'FIN PITCH SCALING FOR HIGH VOLTAGE DEVICES AND LOW VOLTAGE DEVICES ON THE SAME WAFER' [patent_app_type] => utility [patent_app_number] => 14/948745 [patent_app_country] => US [patent_app_date] => 2015-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9630 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14948745 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/948745
Fin pitch scaling for high voltage devices and low voltage devices on the same wafer Nov 22, 2015 Issued
Array ( [id] => 10733260 [patent_doc_number] => 20160079409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/947172 [patent_app_country] => US [patent_app_date] => 2015-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7507 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14947172 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/947172
Semiconductor device and field effect transistor with controllable threshold voltage Nov 19, 2015 Issued
Array ( [id] => 11630901 [patent_doc_number] => 20170141090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'SEMICONDUCTOR DEVICES FOR INTEGRATION WITH LIGHT EMITTING CHIPS AND MODULES THEREOF' [patent_app_type] => utility [patent_app_number] => 14/945170 [patent_app_country] => US [patent_app_date] => 2015-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6883 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14945170 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/945170
Semiconductor devices for integration with light emitting chips and modules thereof Nov 17, 2015 Issued
Array ( [id] => 11417660 [patent_doc_number] => 09564494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Enhanced defect reduction for heteroepitaxy by seed shape engineering' [patent_app_type] => utility [patent_app_number] => 14/944770 [patent_app_country] => US [patent_app_date] => 2015-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14944770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/944770
Enhanced defect reduction for heteroepitaxy by seed shape engineering Nov 17, 2015 Issued
Array ( [id] => 10826071 [patent_doc_number] => 20160172239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'ULTRA-THIN DIELECTRIC DIFFUSION BARRIER AND ETCH STOP LAYER FOR ADVANCED INTERCONNECT APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 14/943913 [patent_app_country] => US [patent_app_date] => 2015-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14943913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/943913
Ultra-thin dielectric diffusion barrier and etch stop layer for advanced interconnect applications Nov 16, 2015 Issued
Array ( [id] => 10826286 [patent_doc_number] => 20160172454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'Reliable and Robust Electrical Contact' [patent_app_type] => utility [patent_app_number] => 14/944048 [patent_app_country] => US [patent_app_date] => 2015-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14944048 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/944048
Reliable and robust electrical contact Nov 16, 2015 Issued
Array ( [id] => 11307813 [patent_doc_number] => 09515219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Nitride semiconductor device and method for producing the same' [patent_app_type] => utility [patent_app_number] => 14/944049 [patent_app_country] => US [patent_app_date] => 2015-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 12704 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14944049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/944049
Nitride semiconductor device and method for producing the same Nov 16, 2015 Issued
Array ( [id] => 11861928 [patent_doc_number] => 09741617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Encapsulated semiconductor package and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 14/942863 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942863 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/942863
Encapsulated semiconductor package and method of manufacturing thereof Nov 15, 2015 Issued
Array ( [id] => 11214941 [patent_doc_number] => 09443981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Thin film transistor, method for manufacturing the same, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/942376 [patent_app_country] => US [patent_app_date] => 2015-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 12234 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14942376 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/942376
Thin film transistor, method for manufacturing the same, and semiconductor device Nov 15, 2015 Issued
Array ( [id] => 11234008 [patent_doc_number] => 09461245 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-04 [patent_title] => 'Bottom electrode for RRAM structure' [patent_app_type] => utility [patent_app_number] => 14/940442 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6008 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14940442 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/940442
Bottom electrode for RRAM structure Nov 12, 2015 Issued
Array ( [id] => 11392011 [patent_doc_number] => 09553263 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-24 [patent_title] => 'Resistive memory elements including buffer materials, and related memory cells, memory devices, electronic systems' [patent_app_type] => utility [patent_app_number] => 14/935196 [patent_app_country] => US [patent_app_date] => 2015-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8288 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14935196 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/935196
Resistive memory elements including buffer materials, and related memory cells, memory devices, electronic systems Nov 5, 2015 Issued
Array ( [id] => 11623240 [patent_doc_number] => 20170133428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'RADIOGRAPHIC DETECTION SUBSTRATE AND MANUFACTURE METHOD THEREOF, RADIOGRAPHIC DETECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 15/109205 [patent_app_country] => US [patent_app_date] => 2015-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3668 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15109205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/109205
Radiographic detection substrate and manufacture method thereof, radiographic detection device Nov 4, 2015 Issued
Array ( [id] => 11259528 [patent_doc_number] => 09484433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Method of manufacturing a MISFET on an SOI substrate' [patent_app_type] => utility [patent_app_number] => 14/929646 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 11758 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929646 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929646
Method of manufacturing a MISFET on an SOI substrate Nov 1, 2015 Issued
Array ( [id] => 11221799 [patent_doc_number] => 09450145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 14/928349 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 11565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928349 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/928349
Semiconductor light emitting device Oct 29, 2015 Issued
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