Ngan V Ngo

Array ( [id] => 8258045 [patent_doc_number] => 08207544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Group-III nitride semiconductor device, epitaxial substrate, and method of fabricating group-III nitride semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/836144 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9006 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836144 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8233274 [patent_doc_number] => 08198719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Semiconductor chip and semiconductor package including the same' [patent_app_type] => utility [patent_app_number] => 12/835927 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3775 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198719.pdf [firstpage_image] =>[orig_patent_app_number] => 12835927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8306353 [patent_doc_number] => 08227898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Ohmic contact on a p-type principal surface tilting with respect to the c-plane' [patent_app_type] => utility [patent_app_number] => 12/836222 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5989073 [patent_doc_number] => 20110012118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/835907 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 35769 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20110012118.pdf [firstpage_image] =>[orig_patent_app_number] => 12835907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8528269 [patent_doc_number] => 08304842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Interconnection structure for N/P metal gates' [patent_app_type] => utility [patent_app_number] => 12/836106 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 4913 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7728227 [patent_doc_number] => 20120012924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Vertical Transistor Component' [patent_app_type] => utility [patent_app_number] => 12/836422 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 14232 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012924.pdf [firstpage_image] =>[orig_patent_app_number] => 12836422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8317841 [patent_doc_number] => 08232619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Semiconductor IC having electrical fuse capable of preventing thermal diffusion' [patent_app_type] => utility [patent_app_number] => 12/836482 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2640 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836482 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8306340 [patent_doc_number] => 08227877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Semiconductor bio-sensors and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/835909 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 4278 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12835909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5996449 [patent_doc_number] => 20110114916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'III-NITRIDE SEMICONDUCTOR OPTICAL DEVICE AND EPITAXIAL SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/836117 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12812 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20110114916.pdf [firstpage_image] =>[orig_patent_app_number] => 12836117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7728192 [patent_doc_number] => 20120012903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'METHOD FOR MAKING A DISILICIDE' [patent_app_type] => utility [patent_app_number] => 12/836026 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012903.pdf [firstpage_image] =>[orig_patent_app_number] => 12836026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7728072 [patent_doc_number] => 20120012835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Metal Oxide Semiconductor Thin Film Transistors' [patent_app_type] => utility [patent_app_number] => 12/836217 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2504 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012835.pdf [firstpage_image] =>[orig_patent_app_number] => 12836217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8435994 [patent_doc_number] => 08283765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Semiconductor chip and stacked semiconductor package having the same' [patent_app_type] => utility [patent_app_number] => 12/835933 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4929 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12835933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8180233 [patent_doc_number] => 20120112344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/383895 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7382 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112344.pdf [firstpage_image] =>[orig_patent_app_number] => 13383895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7724251 [patent_doc_number] => 08097521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Electronic device comprising an integrated circuit and a capacitance element' [patent_app_type] => utility [patent_app_number] => 12/815954 [patent_app_country] => US [patent_app_date] => 2010-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4095 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/097/08097521.pdf [firstpage_image] =>[orig_patent_app_number] => 12815954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7540271 [patent_doc_number] => 08058114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Method of manufacturing the array substrate capable of decreasing a line resistance' [patent_app_type] => utility [patent_app_number] => 12/797527 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 7283 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/058/08058114.pdf [firstpage_image] =>[orig_patent_app_number] => 12797527 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8166081 [patent_doc_number] => 20120104413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'LIGHT EMITTING SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 13/376279 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20120104413.pdf [firstpage_image] =>[orig_patent_app_number] => 13376279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8090333 [patent_doc_number] => 20120080775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'METHOD OF POLISHING SILICON WAFER AS WELL AS SILICON WAFER' [patent_app_type] => utility [patent_app_number] => 13/376259 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3101 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20120080775.pdf [firstpage_image] =>[orig_patent_app_number] => 13376259 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8871082 [patent_doc_number] => 08466460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Fused bithiophene-vinylene polymers' [patent_app_type] => utility [patent_app_number] => 13/376296 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 11800 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13376296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8713186 [patent_doc_number] => 08399326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Method of manufacturing memory devices' [patent_app_type] => utility [patent_app_number] => 12/785500 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3570 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785500 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6641099 [patent_doc_number] => 20100227468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/781554 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 7569 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20100227468.pdf [firstpage_image] =>[orig_patent_app_number] => 12781554 [rel_patent_id] =>[rel_patent_doc_number] =>)