Search

Ngan V. Ngo

Examiner (ID: 3559, Phone: (571)272-1711 , Office: P/2819 )

Most Active Art Unit
2503
Art Unit(s)
2818, 2893, 2503, 2811, 2814, 2819
Total Applications
3475
Issued Applications
2900
Pending Applications
46
Abandoned Applications
536

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7463927 [patent_doc_number] => 20040120246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Information storage medium and optical device using the same' [patent_app_type] => new [patent_app_number] => 10/698870 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3851 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20040120246.pdf [firstpage_image] =>[orig_patent_app_number] => 10698870 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/698870
Information storage medium and optical device using the same Oct 30, 2003 Abandoned
Array ( [id] => 975960 [patent_doc_number] => 06933577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'High performance FET with laterally thin extension' [patent_app_type] => utility [patent_app_number] => 10/605769 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6420 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933577.pdf [firstpage_image] =>[orig_patent_app_number] => 10605769 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605769
High performance FET with laterally thin extension Oct 23, 2003 Issued
Array ( [id] => 963997 [patent_doc_number] => 06949810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Active phase cancellation for power delivery' [patent_app_type] => utility [patent_app_number] => 10/685959 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2930 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949810.pdf [firstpage_image] =>[orig_patent_app_number] => 10685959 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/685959
Active phase cancellation for power delivery Oct 13, 2003 Issued
Array ( [id] => 999847 [patent_doc_number] => 06911698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/678168 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 37 [patent_no_of_words] => 12298 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/911/06911698.pdf [firstpage_image] =>[orig_patent_app_number] => 10678168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678168
Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same Oct 5, 2003 Issued
Array ( [id] => 730177 [patent_doc_number] => 07042086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Stacked semiconductor module and assembling method of the same' [patent_app_type] => utility [patent_app_number] => 10/678208 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 47 [patent_no_of_words] => 17238 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042086.pdf [firstpage_image] =>[orig_patent_app_number] => 10678208 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678208
Stacked semiconductor module and assembling method of the same Oct 5, 2003 Issued
Array ( [id] => 7433952 [patent_doc_number] => 20040065941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Gate dielectric antifuse circuits and methods for operating same' [patent_app_type] => new [patent_app_number] => 10/680481 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 19052 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20040065941.pdf [firstpage_image] =>[orig_patent_app_number] => 10680481 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/680481
Gate dielectric antifuse circuits and methods for operating same Oct 5, 2003 Issued
Array ( [id] => 964148 [patent_doc_number] => 06949961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Power switch structure with low RDSon and low current limit' [patent_app_type] => utility [patent_app_number] => 10/678769 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3532 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949961.pdf [firstpage_image] =>[orig_patent_app_number] => 10678769 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678769
Power switch structure with low RDSon and low current limit Oct 5, 2003 Issued
Array ( [id] => 7451849 [patent_doc_number] => 20040099948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Power semiconductor module with improved insulation strength' [patent_app_type] => new [patent_app_number] => 10/679528 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5752 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099948.pdf [firstpage_image] =>[orig_patent_app_number] => 10679528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679528
Power semiconductor module with improved insulation strength Oct 5, 2003 Abandoned
Array ( [id] => 1060073 [patent_doc_number] => 06853024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-08 [patent_title] => 'Self-aligned MIM capacitor process for embedded DRAM' [patent_app_type] => utility [patent_app_number] => 10/679098 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 3427 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/853/06853024.pdf [firstpage_image] =>[orig_patent_app_number] => 10679098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679098
Self-aligned MIM capacitor process for embedded DRAM Oct 2, 2003 Issued
Array ( [id] => 779534 [patent_doc_number] => 06995402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Integrated reflector cup for a light emitting device mount' [patent_app_type] => utility [patent_app_number] => 10/678279 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2224 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995402.pdf [firstpage_image] =>[orig_patent_app_number] => 10678279 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678279
Integrated reflector cup for a light emitting device mount Oct 2, 2003 Issued
Array ( [id] => 1022495 [patent_doc_number] => 06888193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Split gate flash memory and formation method thereof' [patent_app_type] => utility [patent_app_number] => 10/678909 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2083 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888193.pdf [firstpage_image] =>[orig_patent_app_number] => 10678909 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678909
Split gate flash memory and formation method thereof Oct 2, 2003 Issued
Array ( [id] => 7242100 [patent_doc_number] => 20050073048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Sealing and protecting integrated circuit bonding pads' [patent_app_type] => utility [patent_app_number] => 10/678709 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3239 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073048.pdf [firstpage_image] =>[orig_patent_app_number] => 10678709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678709
Sealing and protecting integrated circuit bonding pads Oct 2, 2003 Issued
Array ( [id] => 7147655 [patent_doc_number] => 20050023567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/677289 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6006 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023567.pdf [firstpage_image] =>[orig_patent_app_number] => 10677289 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/677289
MISFET which constitutes a semiconductor integrated circuit improved in integration Oct 2, 2003 Issued
Array ( [id] => 954105 [patent_doc_number] => 06958520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Semiconductor apparatus which comprises at least two kinds of semiconductor devices operable by voltages of different values' [patent_app_type] => utility [patent_app_number] => 10/677858 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 7681 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958520.pdf [firstpage_image] =>[orig_patent_app_number] => 10677858 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/677858
Semiconductor apparatus which comprises at least two kinds of semiconductor devices operable by voltages of different values Oct 2, 2003 Issued
Array ( [id] => 972613 [patent_doc_number] => 06936888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Nonvolatile memory device with multi-bit memory cells having plural side gates' [patent_app_type] => utility [patent_app_number] => 10/676158 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 57 [patent_no_of_words] => 14969 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/936/06936888.pdf [firstpage_image] =>[orig_patent_app_number] => 10676158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676158
Nonvolatile memory device with multi-bit memory cells having plural side gates Oct 1, 2003 Issued
Array ( [id] => 7241876 [patent_doc_number] => 20050073013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Semiconductor device with asymmetric pocket implants' [patent_app_type] => utility [patent_app_number] => 10/677676 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4834 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20050073013.pdf [firstpage_image] =>[orig_patent_app_number] => 10677676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/677676
Semiconductor device with asymmetric pocket implants Oct 1, 2003 Issued
Array ( [id] => 1066306 [patent_doc_number] => 06847106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-25 [patent_title] => 'Semiconductor circuit with mechanically attached lid' [patent_app_type] => utility [patent_app_number] => 10/676669 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847106.pdf [firstpage_image] =>[orig_patent_app_number] => 10676669 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676669
Semiconductor circuit with mechanically attached lid Sep 30, 2003 Issued
Array ( [id] => 959000 [patent_doc_number] => 06953946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-11 [patent_title] => 'Emitter for electron-beam projection lithography system and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/674459 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 3837 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/953/06953946.pdf [firstpage_image] =>[orig_patent_app_number] => 10674459 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/674459
Emitter for electron-beam projection lithography system and manufacturing method thereof Sep 30, 2003 Issued
Array ( [id] => 1009693 [patent_doc_number] => 06900455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Multilayer dielectric tunnel barrier used in magnetic tunnel junction devices, and its method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/674549 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7580 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900455.pdf [firstpage_image] =>[orig_patent_app_number] => 10674549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/674549
Multilayer dielectric tunnel barrier used in magnetic tunnel junction devices, and its method of fabrication Sep 30, 2003 Issued
Array ( [id] => 7114338 [patent_doc_number] => 20050067638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Interfacial trap layer to improve carrier injection' [patent_app_type] => utility [patent_app_number] => 10/676969 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6831 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20050067638.pdf [firstpage_image] =>[orig_patent_app_number] => 10676969 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676969
Interfacial trap layer to improve carrier injection Sep 29, 2003 Issued
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