Ngan V. Ngo

Array ( [id] => 1006012 [patent_doc_number] => 06906388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-14 [patent_title] => 'SEU hard majority voter for triple redundancy' [patent_app_type] => utility [patent_app_number] => 10/447548 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2771 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/906/06906388.pdf [firstpage_image] =>[orig_patent_app_number] => 10447548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7445764 [patent_doc_number] => 20040051152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => new [patent_app_number] => 10/437119 [patent_app_country] => US [patent_app_date] => 2003-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3399 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20040051152.pdf [firstpage_image] =>[orig_patent_app_number] => 10437119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7614991 [patent_doc_number] => 06897535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Integrated circuit with reverse engineering protection' [patent_app_type] => utility [patent_app_number] => 10/438689 [patent_app_country] => US [patent_app_date] => 2003-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5645 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897535.pdf [firstpage_image] =>[orig_patent_app_number] => 10438689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7611028 [patent_doc_number] => 06841829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Self protecting bipolar SCR' [patent_app_type] => utility [patent_app_number] => 10/436559 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2002 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841829.pdf [firstpage_image] =>[orig_patent_app_number] => 10436559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 646311 [patent_doc_number] => 07119383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Arrangement of wiring lines including power source lines and channel wirings of a semiconductor integrated circuit having plural cells' [patent_app_type] => utility [patent_app_number] => 10/431398 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 12506 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/119/07119383.pdf [firstpage_image] =>[orig_patent_app_number] => 10431398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6662112 [patent_doc_number] => 20030201438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Thin film transistor array panel for liquid crystal display' [patent_app_type] => new [patent_app_number] => 10/431610 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8232 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201438.pdf [firstpage_image] =>[orig_patent_app_number] => 10431610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768043 [patent_doc_number] => 20030213983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Charge-coupled device having a reduced width for barrier sections in a transfer channel' [patent_app_type] => new [patent_app_number] => 10/430068 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4764 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20030213983.pdf [firstpage_image] =>[orig_patent_app_number] => 10430068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6723397 [patent_doc_number] => 20030205709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Thin-film-transistor organic electroluminescent device' [patent_app_type] => new [patent_app_number] => 10/427958 [patent_app_country] => US [patent_app_date] => 2003-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3109 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20030205709.pdf [firstpage_image] =>[orig_patent_app_number] => 10427958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7427171 [patent_doc_number] => 20040007706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Semiconductor device and microprocessor' [patent_app_type] => new [patent_app_number] => 10/428158 [patent_app_country] => US [patent_app_date] => 2003-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14733 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20040007706.pdf [firstpage_image] =>[orig_patent_app_number] => 10428158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1116959 [patent_doc_number] => 06800923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-05 [patent_title] => 'Multilayer analog interconnecting line layout for a mixed-signal integrated circuit' [patent_app_type] => B1 [patent_app_number] => 10/422909 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3733 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/800/06800923.pdf [firstpage_image] =>[orig_patent_app_number] => 10422909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1158739 [patent_doc_number] => 06765295 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Multiplexing system and method for crossing signals on a single metal layer of an integrated circuit' [patent_app_type] => B1 [patent_app_number] => 10/421499 [patent_app_country] => US [patent_app_date] => 2003-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2871 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765295.pdf [firstpage_image] =>[orig_patent_app_number] => 10421499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1136543 [patent_doc_number] => 06784520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Semiconductor devices constitute constant voltage devices used to raise internal voltage' [patent_app_type] => B2 [patent_app_number] => 10/411268 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 8265 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784520.pdf [firstpage_image] =>[orig_patent_app_number] => 10411268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6662156 [patent_doc_number] => 20030201482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Wide bandgap semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/410188 [patent_app_country] => US [patent_app_date] => 2003-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201482.pdf [firstpage_image] =>[orig_patent_app_number] => 10410188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768054 [patent_doc_number] => 20030213994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Thin film memory, array, and operation method and manufacture method therefor' [patent_app_type] => new [patent_app_number] => 10/410239 [patent_app_country] => US [patent_app_date] => 2003-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9155 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20030213994.pdf [firstpage_image] =>[orig_patent_app_number] => 10410239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6610498 [patent_doc_number] => 20030209709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Display device with an improved contact hole arrangement for contacting a semiconductor layer through an insulation film' [patent_app_type] => new [patent_app_number] => 10/408451 [patent_app_country] => US [patent_app_date] => 2003-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8686 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20030209709.pdf [firstpage_image] =>[orig_patent_app_number] => 10408451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7627906 [patent_doc_number] => 06806531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'Non-volatile floating gate memory cell with floating gates formed in cavities, and array thereof, and method of formation' [patent_app_type] => B1 [patent_app_number] => 10/409248 [patent_app_country] => US [patent_app_date] => 2003-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 37 [patent_no_of_words] => 6018 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806531.pdf [firstpage_image] =>[orig_patent_app_number] => 10409248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768033 [patent_doc_number] => 20030213973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Heterojunction bipolar transistor and its manufacturing method' [patent_app_type] => new [patent_app_number] => 10/407428 [patent_app_country] => US [patent_app_date] => 2003-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9325 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20030213973.pdf [firstpage_image] =>[orig_patent_app_number] => 10407428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 988379 [patent_doc_number] => 06921934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Double pinned photodiode for CMOS APS and method of formation' [patent_app_type] => utility [patent_app_number] => 10/400389 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6158 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/921/06921934.pdf [firstpage_image] =>[orig_patent_app_number] => 10400389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6727644 [patent_doc_number] => 20030183834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Light-receiving module' [patent_app_type] => new [patent_app_number] => 10/397839 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3738 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183834.pdf [firstpage_image] =>[orig_patent_app_number] => 10397839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7334221 [patent_doc_number] => 20040188825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'PACKAGE STRUCTURE WITH INCREASED CAPACITANCE AND METHOD' [patent_app_type] => new [patent_app_number] => 10/401379 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3642 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20040188825.pdf [firstpage_image] =>[orig_patent_app_number] => 10401379 [rel_patent_id] =>[rel_patent_doc_number] =>)