Ngan V. Ngo

Array ( [id] => 982590 [patent_doc_number] => 06927434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Providing current to compensate for spurious current while receiving signals through a line' [patent_app_type] => utility [patent_app_number] => 10/216248 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927434.pdf [firstpage_image] =>[orig_patent_app_number] => 10216248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1266461 [patent_doc_number] => 06661047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'CMOS imager and method of formation' [patent_app_type] => B2 [patent_app_number] => 10/213085 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6235 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661047.pdf [firstpage_image] =>[orig_patent_app_number] => 10213085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6713776 [patent_doc_number] => 20030025124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Circuit configuration for load-relieved switching' [patent_app_type] => new [patent_app_number] => 10/210664 [patent_app_country] => US [patent_app_date] => 2002-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6965 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025124.pdf [firstpage_image] =>[orig_patent_app_number] => 10210664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6858951 [patent_doc_number] => 20030089959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Schottky barrier diode' [patent_app_type] => new [patent_app_number] => 10/205608 [patent_app_country] => US [patent_app_date] => 2002-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6236 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20030089959.pdf [firstpage_image] =>[orig_patent_app_number] => 10205608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6713780 [patent_doc_number] => 20030025128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Low emitter resistance contacts to GaAs high speed HBT' [patent_app_type] => new [patent_app_number] => 10/200892 [patent_app_country] => US [patent_app_date] => 2002-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3916 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025128.pdf [firstpage_image] =>[orig_patent_app_number] => 10200892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6837190 [patent_doc_number] => 20030034530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Nonvolatile semiconductor storage device' [patent_app_type] => new [patent_app_number] => 10/197644 [patent_app_country] => US [patent_app_date] => 2002-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11918 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 570 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034530.pdf [firstpage_image] =>[orig_patent_app_number] => 10197644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1180350 [patent_doc_number] => 06744106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/197668 [patent_app_country] => US [patent_app_date] => 2002-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9951 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744106.pdf [firstpage_image] =>[orig_patent_app_number] => 10197668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6816075 [patent_doc_number] => 20030067033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'High withstand voltage semiconductor device' [patent_app_type] => new [patent_app_number] => 10/196448 [patent_app_country] => US [patent_app_date] => 2002-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11601 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20030067033.pdf [firstpage_image] =>[orig_patent_app_number] => 10196448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6716024 [patent_doc_number] => 20030027372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Semiconductor device having leads provided with interrupter for molten resin' [patent_app_type] => new [patent_app_number] => 10/196908 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3112 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20030027372.pdf [firstpage_image] =>[orig_patent_app_number] => 10196908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1319028 [patent_doc_number] => 06608353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'Thin film transistor having pixel electrode connected to a laminate structure' [patent_app_type] => B2 [patent_app_number] => 10/193162 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 6412 [patent_no_of_claims] => 106 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608353.pdf [firstpage_image] =>[orig_patent_app_number] => 10193162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6713853 [patent_doc_number] => 20030025201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Integrated circuit chip with little possibility of becoming damaged and structure for mounting the same' [patent_app_type] => new [patent_app_number] => 10/191989 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3896 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025201.pdf [firstpage_image] =>[orig_patent_app_number] => 10191989 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1257214 [patent_doc_number] => 06667514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-23 [patent_title] => 'Semiconductor component with a charge compensation structure and associated fabrication' [patent_app_type] => B2 [patent_app_number] => 10/190119 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 7093 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/667/06667514.pdf [firstpage_image] =>[orig_patent_app_number] => 10190119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6758824 [patent_doc_number] => 20030122185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Self aligned method of forming a semiconductor memory array of floating gate memory cells with horizontally oriented edges, and a memory array thereby' [patent_app_type] => new [patent_app_number] => 10/183834 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 14163 [patent_no_of_claims] => 92 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122185.pdf [firstpage_image] =>[orig_patent_app_number] => 10183834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7626596 [patent_doc_number] => 06768166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Vertical transistor, memory arrangement and method for fabricating a vertical transistor' [patent_app_type] => B2 [patent_app_number] => 10/183849 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3857 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768166.pdf [firstpage_image] =>[orig_patent_app_number] => 10183849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1083412 [patent_doc_number] => 06833587 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-21 [patent_title] => 'Heat removal in SOI devices using a buried oxide layer/conductive layer combination' [patent_app_type] => B1 [patent_app_number] => 10/174328 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5024 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833587.pdf [firstpage_image] =>[orig_patent_app_number] => 10174328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6803393 [patent_doc_number] => 20030230787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'REDUCING FUSE PROGRAMMING TIME FOR NON-VOLATILE STORAGE OF DATA' [patent_app_type] => new [patent_app_number] => 10/170428 [patent_app_country] => US [patent_app_date] => 2002-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2941 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20030230787.pdf [firstpage_image] =>[orig_patent_app_number] => 10170428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7264166 [patent_doc_number] => 20040242001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Notched compound semiconductor wafer' [patent_app_type] => new [patent_app_number] => 10/489499 [patent_app_country] => US [patent_app_date] => 2004-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5605 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20040242001.pdf [firstpage_image] =>[orig_patent_app_number] => 10489499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1403924 [patent_doc_number] => 06541841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Semiconductor device including high frequency circuit with inductor' [patent_app_type] => B2 [patent_app_number] => 10/163613 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 36 [patent_no_of_words] => 12481 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541841.pdf [firstpage_image] =>[orig_patent_app_number] => 10163613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6444484 [patent_doc_number] => 20020149056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Electro-optical device and semiconductor device' [patent_app_type] => new [patent_app_number] => 10/161695 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 20019 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149056.pdf [firstpage_image] =>[orig_patent_app_number] => 10161695 [rel_patent_id] =>[rel_patent_doc_number] =>)