Search

Ngoc Yen M. Nguyen

Examiner (ID: 43, Phone: (571)272-1356 , Office: P/1734 )

Most Active Art Unit
1734
Art Unit(s)
1103, 1754, 1734, 1793
Total Applications
1524
Issued Applications
795
Pending Applications
89
Abandoned Applications
640

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7321208 [patent_doc_number] => 20040225841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Method and apparatus for providing full accessibility to instruction cache and microcode ROM' [patent_app_type] => new [patent_app_number] => 10/850901 [patent_app_country] => US [patent_app_date] => 2004-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6494 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225841.pdf [firstpage_image] =>[orig_patent_app_number] => 10850901 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/850901
Method and apparatus for providing full accessibility to instruction cache and microcode ROM May 20, 2004 Issued
Array ( [id] => 914503 [patent_doc_number] => 07330938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'Hybrid-cache having static and dynamic portions' [patent_app_type] => utility [patent_app_number] => 10/849354 [patent_app_country] => US [patent_app_date] => 2004-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5511 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/330/07330938.pdf [firstpage_image] =>[orig_patent_app_number] => 10849354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/849354
Hybrid-cache having static and dynamic portions May 17, 2004 Issued
Array ( [id] => 6940858 [patent_doc_number] => 20050114421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Interleaving memory' [patent_app_type] => utility [patent_app_number] => 10/844486 [patent_app_country] => US [patent_app_date] => 2004-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12314 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20050114421.pdf [firstpage_image] =>[orig_patent_app_number] => 10844486 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/844486
Interleaving input sequences to memory May 12, 2004 Issued
Array ( [id] => 421670 [patent_doc_number] => 07278140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Apparatus and method of updating data of an embedded system, and apparatus for updating data of memory' [patent_app_type] => utility [patent_app_number] => 10/844988 [patent_app_country] => US [patent_app_date] => 2004-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1689 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/278/07278140.pdf [firstpage_image] =>[orig_patent_app_number] => 10844988 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/844988
Apparatus and method of updating data of an embedded system, and apparatus for updating data of memory May 11, 2004 Issued
Array ( [id] => 453398 [patent_doc_number] => 07251722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Semantic processor storage server architecture' [patent_app_type] => utility [patent_app_number] => 10/843727 [patent_app_country] => US [patent_app_date] => 2004-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8373 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251722.pdf [firstpage_image] =>[orig_patent_app_number] => 10843727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/843727
Semantic processor storage server architecture May 10, 2004 Issued
Array ( [id] => 548646 [patent_doc_number] => 07185164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-27 [patent_title] => 'Method for rearranging logical volume' [patent_app_type] => utility [patent_app_number] => 10/834839 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7515 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/185/07185164.pdf [firstpage_image] =>[orig_patent_app_number] => 10834839 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834839
Method for rearranging logical volume Apr 29, 2004 Issued
Array ( [id] => 7321559 [patent_doc_number] => 20040225925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Method for detecting computer memory access errors' [patent_app_type] => new [patent_app_number] => 10/834912 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2378 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225925.pdf [firstpage_image] =>[orig_patent_app_number] => 10834912 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834912
Method for detecting computer memory access errors Apr 29, 2004 Abandoned
Array ( [id] => 7071108 [patent_doc_number] => 20050246493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'Detachable programmable memory card for a computer controlled instrument with an indicator on the memory card displaying that a predetermined level of the card memory has been used' [patent_app_type] => utility [patent_app_number] => 10/835347 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1934 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20050246493.pdf [firstpage_image] =>[orig_patent_app_number] => 10835347 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835347
Detachable programmable memory card for a computer controlled instrument with an indicator on the memory card displaying that a predetermined level of the card memory has been used Apr 28, 2004 Abandoned
Array ( [id] => 671451 [patent_doc_number] => 07096283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Synchronous flash memory with status burst output' [patent_app_type] => utility [patent_app_number] => 10/831823 [patent_app_country] => US [patent_app_date] => 2004-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 14962 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/096/07096283.pdf [firstpage_image] =>[orig_patent_app_number] => 10831823 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/831823
Synchronous flash memory with status burst output Apr 25, 2004 Issued
Array ( [id] => 526688 [patent_doc_number] => 07200718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Cache memory for a scalable information distribution system' [patent_app_type] => utility [patent_app_number] => 10/832489 [patent_app_country] => US [patent_app_date] => 2004-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3814 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200718.pdf [firstpage_image] =>[orig_patent_app_number] => 10832489 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832489
Cache memory for a scalable information distribution system Apr 25, 2004 Issued
Array ( [id] => 472852 [patent_doc_number] => 07234033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Data synchronization of multiple remote storage facilities' [patent_app_type] => utility [patent_app_number] => 10/832839 [patent_app_country] => US [patent_app_date] => 2004-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 7040 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/234/07234033.pdf [firstpage_image] =>[orig_patent_app_number] => 10832839 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832839
Data synchronization of multiple remote storage facilities Apr 25, 2004 Issued
Array ( [id] => 512578 [patent_doc_number] => 07206863 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-17 [patent_title] => 'System and method for managing storage networks and providing virtualization of resources in such a network' [patent_app_type] => utility [patent_app_number] => 10/810988 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 12163 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206863.pdf [firstpage_image] =>[orig_patent_app_number] => 10810988 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810988
System and method for managing storage networks and providing virtualization of resources in such a network Mar 25, 2004 Issued
Array ( [id] => 839945 [patent_doc_number] => 07395445 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-01 [patent_title] => 'Controller for power supplies' [patent_app_type] => utility [patent_app_number] => 10/811113 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6587 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/395/07395445.pdf [firstpage_image] =>[orig_patent_app_number] => 10811113 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/811113
Controller for power supplies Mar 25, 2004 Issued
Array ( [id] => 6962315 [patent_doc_number] => 20050216695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Memory extension for a data processor to provide both common and separate physical memory areas for virtual memory spaces' [patent_app_type] => utility [patent_app_number] => 10/811045 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20050216695.pdf [firstpage_image] =>[orig_patent_app_number] => 10811045 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/811045
Memory extension for a data processor to provide both common and separate physical memory areas for virtual memory spaces Mar 25, 2004 Abandoned
Array ( [id] => 905056 [patent_doc_number] => 07340639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-03-04 [patent_title] => 'System and method for proxying data access commands in a clustered storage system' [patent_app_type] => utility [patent_app_number] => 10/811095 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8290 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/340/07340639.pdf [firstpage_image] =>[orig_patent_app_number] => 10811095 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/811095
System and method for proxying data access commands in a clustered storage system Mar 25, 2004 Issued
Array ( [id] => 7155891 [patent_doc_number] => 20050083338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'DSP (digital signal processing) architecture with a wide memory bandwidth and a memory mapping method thereof' [patent_app_type] => utility [patent_app_number] => 10/808341 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3946 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20050083338.pdf [firstpage_image] =>[orig_patent_app_number] => 10808341 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/808341
Digital signal processing architecture with a wide memory bandwidth and a memory mapping method thereof Mar 24, 2004 Issued
Array ( [id] => 7077014 [patent_doc_number] => 20050149645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Storage control device' [patent_app_type] => utility [patent_app_number] => 10/809740 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17715 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20050149645.pdf [firstpage_image] =>[orig_patent_app_number] => 10809740 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809740
Storage control device with a plurality of channel control sections Mar 23, 2004 Issued
Array ( [id] => 7418134 [patent_doc_number] => 20040177220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Distribution of I/O requests across multiple disk units' [patent_app_type] => new [patent_app_number] => 10/799013 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4541 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20040177220.pdf [firstpage_image] =>[orig_patent_app_number] => 10799013 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/799013
Distribution of I/O requests across multiple disk units Mar 10, 2004 Issued
Array ( [id] => 7458555 [patent_doc_number] => 20040187130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Operating system having a system page and method for using same' [patent_app_type] => new [patent_app_number] => 10/800068 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4073 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20040187130.pdf [firstpage_image] =>[orig_patent_app_number] => 10800068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/800068
Operating system permitting limited access to a system page Mar 10, 2004 Issued
Array ( [id] => 7154245 [patent_doc_number] => 20040172499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Synchronous flash memory with accessible page during write' [patent_app_type] => new [patent_app_number] => 10/798065 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 15266 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20040172499.pdf [firstpage_image] =>[orig_patent_app_number] => 10798065 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/798065
Synchronous flash memory with accessible page during write Mar 10, 2004 Issued
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