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Ngoclan Thi Mai

Examiner (ID: 11143, Phone: (571)272-1246 , Office: P/1733 )

Most Active Art Unit
1742
Art Unit(s)
1733, 2899, 3641, 5332, 2204, 1741, 1793, 1742, 1734
Total Applications
2444
Issued Applications
2034
Pending Applications
108
Abandoned Applications
302

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16034529 [patent_doc_number] => 10679691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Semiconductor system including a counting circuit block [patent_app_type] => utility [patent_app_number] => 16/203350 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5933 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203350 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203350
Semiconductor system including a counting circuit block Nov 27, 2018 Issued
Array ( [id] => 15369215 [patent_doc_number] => 20200020372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/200980 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10000 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200980 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200980
Semiconductor devices Nov 26, 2018 Issued
Array ( [id] => 15547207 [patent_doc_number] => 10573393 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-25 [patent_title] => Method for detecting storing states of solid state storage device [patent_app_type] => utility [patent_app_number] => 16/198996 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7510 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/198996
Method for detecting storing states of solid state storage device Nov 22, 2018 Issued
Array ( [id] => 15286073 [patent_doc_number] => 10515705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Removing pump noise in a sensing circuit [patent_app_type] => utility [patent_app_number] => 16/198856 [patent_app_country] => US [patent_app_date] => 2018-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2153 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/198856
Removing pump noise in a sensing circuit Nov 21, 2018 Issued
Array ( [id] => 15138971 [patent_doc_number] => 10482967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-19 [patent_title] => Layout structure of local x-decoder [patent_app_type] => utility [patent_app_number] => 16/198854 [patent_app_country] => US [patent_app_date] => 2018-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1609 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198854 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/198854
Layout structure of local x-decoder Nov 21, 2018 Issued
Array ( [id] => 15760829 [patent_doc_number] => 10622547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Magnetic memory using spin-orbit torque [patent_app_type] => utility [patent_app_number] => 16/193660 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7500 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193660 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193660
Magnetic memory using spin-orbit torque Nov 15, 2018 Issued
Array ( [id] => 15108363 [patent_doc_number] => 10475511 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => Read operation with data latch and signal termination for 1TNR memory array [patent_app_type] => utility [patent_app_number] => 16/193592 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12118 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 549 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193592
Read operation with data latch and signal termination for 1TNR memory array Nov 15, 2018 Issued
Array ( [id] => 15984297 [patent_doc_number] => 10672484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Sensing in floating source string NOR architecture [patent_app_type] => utility [patent_app_number] => 16/193292 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 47 [patent_no_of_words] => 10194 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193292 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193292
Sensing in floating source string NOR architecture Nov 15, 2018 Issued
Array ( [id] => 15580865 [patent_doc_number] => 10580827 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-03 [patent_title] => Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching [patent_app_type] => utility [patent_app_number] => 16/192972 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 13928 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192972
Adjustable stabilizer/polarizer method for MRAM with enhanced stability and efficient switching Nov 15, 2018 Issued
Array ( [id] => 14903777 [patent_doc_number] => 20190295654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/192528 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192528
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE Nov 14, 2018 Abandoned
Array ( [id] => 14049327 [patent_doc_number] => 20190080770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => NON-VOLATILE MEMORY DEVICE INCLUDING DECOUPLING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/186840 [patent_app_country] => US [patent_app_date] => 2018-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186840 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186840
Non-volatile memory device including decoupling circuit Nov 11, 2018 Issued
Array ( [id] => 16356226 [patent_doc_number] => 10796743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Dynamic adjustment of memory cell digit line capacitance [patent_app_type] => utility [patent_app_number] => 16/184492 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184492
Dynamic adjustment of memory cell digit line capacitance Nov 7, 2018 Issued
Array ( [id] => 15857405 [patent_doc_number] => 10644001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Semiconductor memory device having an electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 16/174377 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 147 [patent_figures_cnt] => 245 [patent_no_of_words] => 41793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174377
Semiconductor memory device having an electrically floating body transistor Oct 29, 2018 Issued
Array ( [id] => 15640763 [patent_doc_number] => 10593384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Methods of determining host clock frequency for run time optimization of memory and memory devices employing the same [patent_app_type] => utility [patent_app_number] => 16/174782 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2617 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174782 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174782
Methods of determining host clock frequency for run time optimization of memory and memory devices employing the same Oct 29, 2018 Issued
Array ( [id] => 13908761 [patent_doc_number] => 20190043585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => TAILORING TIMING OFFSETS DURING A PROGRAMMING PULSE FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/147422 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12096 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147422
Tailoring timing offsets during a programming pulse for a memory device Sep 27, 2018 Issued
Array ( [id] => 15717107 [patent_doc_number] => 20200105321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => TECHNIQUE TO LOWER SWITCHING POWER OF BIT-LINES BY ADIABATIC CHARGING OF SRAM MEMORIES [patent_app_type] => utility [patent_app_number] => 16/147454 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147454
Technique to lower switching power of bit-lines by adiabatic charging of SRAM memories Sep 27, 2018 Issued
Array ( [id] => 16293275 [patent_doc_number] => 10770128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Non volatile mass storage device with improved refresh algorithm [patent_app_type] => utility [patent_app_number] => 16/147446 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5675 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147446
Non volatile mass storage device with improved refresh algorithm Sep 27, 2018 Issued
Array ( [id] => 14858737 [patent_doc_number] => 10418102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Apparatuses and methods including memory and operation of same [patent_app_type] => utility [patent_app_number] => 16/137950 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7492 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137950
Apparatuses and methods including memory and operation of same Sep 20, 2018 Issued
Array ( [id] => 14858737 [patent_doc_number] => 10418102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Apparatuses and methods including memory and operation of same [patent_app_type] => utility [patent_app_number] => 16/137950 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7492 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137950
Apparatuses and methods including memory and operation of same Sep 20, 2018 Issued
Array ( [id] => 14858737 [patent_doc_number] => 10418102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Apparatuses and methods including memory and operation of same [patent_app_type] => utility [patent_app_number] => 16/137950 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7492 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137950
Apparatuses and methods including memory and operation of same Sep 20, 2018 Issued
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