Search

Ngoclan Thi Mai

Examiner (ID: 11143, Phone: (571)272-1246 , Office: P/1733 )

Most Active Art Unit
1742
Art Unit(s)
1733, 2899, 3641, 5332, 2204, 1741, 1793, 1742, 1734
Total Applications
2444
Issued Applications
2034
Pending Applications
108
Abandoned Applications
302

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14858737 [patent_doc_number] => 10418102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Apparatuses and methods including memory and operation of same [patent_app_type] => utility [patent_app_number] => 16/137950 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7492 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137950
Apparatuses and methods including memory and operation of same Sep 20, 2018 Issued
Array ( [id] => 13832161 [patent_doc_number] => 20190019565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => Memory Device with a Fuse Protection Circuit [patent_app_type] => utility [patent_app_number] => 16/133783 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133783 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133783
Memory device with a fuse protection circuit Sep 17, 2018 Issued
Array ( [id] => 13847983 [patent_doc_number] => 20190027476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => NAND String Utilizing Floating Body Memory Cell [patent_app_type] => utility [patent_app_number] => 16/132675 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132675
NAND string utilizing floating body memory cell Sep 16, 2018 Issued
Array ( [id] => 13799037 [patent_doc_number] => 20190013057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => APPARATUSES AND METHODS INCLUDING FERROELECTRIC MEMORY AND FOR ACCESSING FERROELECTRIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/131969 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16131969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/131969
Apparatuses and methods including ferroelectric memory and for accessing ferroelectric memory Sep 13, 2018 Issued
Array ( [id] => 15657767 [patent_doc_number] => 20200091414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => MAGNETOELECTRIC SPIN ORBIT LOGIC BASED FULL ADDER [patent_app_type] => utility [patent_app_number] => 16/130912 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130912 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/130912
Magnetoelectric spin orbit logic based full adder Sep 12, 2018 Issued
Array ( [id] => 15169501 [patent_doc_number] => 10490253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Semiconductor system and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/129442 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5066 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129442
Semiconductor system and semiconductor device Sep 11, 2018 Issued
Array ( [id] => 14237617 [patent_doc_number] => 20190130981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => DETECTING POWER LOSS IN NAND MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/129497 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129497 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129497
Detecting power loss in NAND memory devices Sep 11, 2018 Issued
Array ( [id] => 16218235 [patent_doc_number] => 10734055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/128720 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9160 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128720 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128720
Memory device Sep 11, 2018 Issued
Array ( [id] => 14904637 [patent_doc_number] => 20190296084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/123022 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16123022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/123022
STORAGE DEVICE Sep 5, 2018 Abandoned
Array ( [id] => 15108329 [patent_doc_number] => 10475494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Memory device and memory system including the same [patent_app_type] => utility [patent_app_number] => 16/122350 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 7959 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122350 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122350
Memory device and memory system including the same Sep 4, 2018 Issued
Array ( [id] => 14079561 [patent_doc_number] => 20190088668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => NOR Memory Cell with Vertical Floating Gate [patent_app_type] => utility [patent_app_number] => 16/122800 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122800 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122800
NOR memory cell with vertical floating gate Sep 4, 2018 Issued
Array ( [id] => 15791097 [patent_doc_number] => 10629278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => First-pass dynamic program targeting (DPT) [patent_app_type] => utility [patent_app_number] => 16/122410 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 14953 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122410
First-pass dynamic program targeting (DPT) Sep 4, 2018 Issued
Array ( [id] => 15250837 [patent_doc_number] => 10510949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Magnetic memory device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/119553 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 54 [patent_no_of_words] => 19753 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16119553 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/119553
Magnetic memory device and method for manufacturing the same Aug 30, 2018 Issued
Array ( [id] => 15287415 [patent_doc_number] => 10516383 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Reducing power consumption in a processor circuit [patent_app_type] => utility [patent_app_number] => 16/112564 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2697 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16112564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/112564
Reducing power consumption in a processor circuit Aug 23, 2018 Issued
Array ( [id] => 14049245 [patent_doc_number] => 20190080729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SYSTEMS FOR VOLTAGE REGULATION USING SIGNAL BUFFERS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/110936 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110936 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110936
Systems for voltage regulation using signal buffers and related methods Aug 22, 2018 Issued
Array ( [id] => 14827359 [patent_doc_number] => 10410690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-10 [patent_title] => Reference-free multi-level sensing circuit for computing-in-memory applications, reference-free memory unit for computing-in-memory applications and sensing method thereof [patent_app_type] => utility [patent_app_number] => 16/109734 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4845 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109734
Reference-free multi-level sensing circuit for computing-in-memory applications, reference-free memory unit for computing-in-memory applications and sensing method thereof Aug 21, 2018 Issued
Array ( [id] => 16249257 [patent_doc_number] => 10748631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/108810 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9367 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16108810 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/108810
Semiconductor memory device Aug 21, 2018 Issued
Array ( [id] => 13613067 [patent_doc_number] => 20180358083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => APPARATUSES AND METHODS INCLUDING TWO TRANSISTOR-ONE CAPACITOR MEMORY AND FOR ACCESSING SAME [patent_app_type] => utility [patent_app_number] => 16/105631 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105631
Apparatuses and methods including two transistor-one capacitor memory and for accessing same Aug 19, 2018 Issued
Array ( [id] => 13613067 [patent_doc_number] => 20180358083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => APPARATUSES AND METHODS INCLUDING TWO TRANSISTOR-ONE CAPACITOR MEMORY AND FOR ACCESSING SAME [patent_app_type] => utility [patent_app_number] => 16/105631 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105631
Apparatuses and methods including two transistor-one capacitor memory and for accessing same Aug 19, 2018 Issued
Array ( [id] => 13613067 [patent_doc_number] => 20180358083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => APPARATUSES AND METHODS INCLUDING TWO TRANSISTOR-ONE CAPACITOR MEMORY AND FOR ACCESSING SAME [patent_app_type] => utility [patent_app_number] => 16/105631 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105631
Apparatuses and methods including two transistor-one capacitor memory and for accessing same Aug 19, 2018 Issued
Menu