Search

Nicholas A. Ros

Examiner (ID: 17108)

Most Active Art Unit
3754
Art Unit(s)
3754, 3751
Total Applications
632
Issued Applications
325
Pending Applications
77
Abandoned Applications
254

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15123687 [patent_doc_number] => 20190348477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/114181 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114181 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/114181
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE Aug 26, 2018 Abandoned
Array ( [id] => 13740957 [patent_doc_number] => 20180374948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/114174 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16114174 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/114174
Semiconductor device and manufacturing method thereof Aug 26, 2018 Issued
Array ( [id] => 16881359 [patent_doc_number] => 11031517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Method of manufacturing light transmission type compound thin film, compound thin film manufactured therefrom, and solar cell including the same [patent_app_type] => utility [patent_app_number] => 16/111805 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 9596 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111805 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111805
Method of manufacturing light transmission type compound thin film, compound thin film manufactured therefrom, and solar cell including the same Aug 23, 2018 Issued
Array ( [id] => 13631265 [patent_doc_number] => 20180367186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/110113 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110113 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110113
SEMICONDUCTOR DEVICE Aug 22, 2018 Abandoned
Array ( [id] => 16034947 [patent_doc_number] => 10679905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Semiconductor structures and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 16/105758 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 14335 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105758
Semiconductor structures and fabrication methods thereof Aug 19, 2018 Issued
Array ( [id] => 14904541 [patent_doc_number] => 20190296036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => Semiconductor Device and Manufacturing Method Thereof [patent_app_type] => utility [patent_app_number] => 16/105892 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105892 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105892
Semiconductor device and manufacturing method thereof Aug 19, 2018 Issued
Array ( [id] => 15580967 [patent_doc_number] => 10580878 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-03 [patent_title] => SiC device with buried doped region [patent_app_type] => utility [patent_app_number] => 16/105742 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 48 [patent_no_of_words] => 10793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105742 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105742
SiC device with buried doped region Aug 19, 2018 Issued
Array ( [id] => 15234627 [patent_doc_number] => 10505044 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-10 [patent_title] => Semiconductor structure, capacitor structure thereof and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 16/105939 [patent_app_country] => US [patent_app_date] => 2018-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16105939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/105939
Semiconductor structure, capacitor structure thereof and manufacturing method of the same Aug 19, 2018 Issued
Array ( [id] => 13785423 [patent_doc_number] => 20190006250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => FABRICATION OF A SACRIFICIAL INTERPOSER TEST STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/104433 [patent_app_country] => US [patent_app_date] => 2018-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16104433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/104433
Fabrication of a sacrificial interposer test structure Aug 16, 2018 Issued
Array ( [id] => 13963045 [patent_doc_number] => 20190057867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => Method and device for incorporating single diffusion break into nanochannel structures of fet devices [patent_app_type] => utility [patent_app_number] => 15/998509 [patent_app_country] => US [patent_app_date] => 2018-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15998509 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/998509
Method and device for incorporating single diffusion break into nanochannel structures of FET devices Aug 15, 2018 Issued
Array ( [id] => 15401405 [patent_doc_number] => 10541365 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => Phase change memory and method of fabricating same [patent_app_type] => utility [patent_app_number] => 15/998689 [patent_app_country] => US [patent_app_date] => 2018-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15998689 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/998689
Phase change memory and method of fabricating same Aug 14, 2018 Issued
Array ( [id] => 15984591 [patent_doc_number] => 10672631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Method and system for substrate thinning [patent_app_type] => utility [patent_app_number] => 16/103933 [patent_app_country] => US [patent_app_date] => 2018-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103933
Method and system for substrate thinning Aug 14, 2018 Issued
Array ( [id] => 15109321 [patent_doc_number] => 10475993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => PCM RF switch fabrication with subtractively formed heater [patent_app_type] => utility [patent_app_number] => 16/103646 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 5898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103646
PCM RF switch fabrication with subtractively formed heater Aug 13, 2018 Issued
Array ( [id] => 14110151 [patent_doc_number] => 20190096751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => Dual Damascene Process for Forming Vias and Interconnects in an Integrated Circuit Structure [patent_app_type] => utility [patent_app_number] => 16/103538 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103538 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103538
Dual Damascene Process for Forming Vias and Interconnects in an Integrated Circuit Structure Aug 13, 2018 Abandoned
Array ( [id] => 15250131 [patent_doc_number] => 10510594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Method of cleaning wafer after CMP [patent_app_type] => utility [patent_app_number] => 16/050168 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5615 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/050168
Method of cleaning wafer after CMP Jul 30, 2018 Issued
Array ( [id] => 16502453 [patent_doc_number] => 10867847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/049187 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 49 [patent_no_of_words] => 5950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049187 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/049187
Semiconductor device and manufacturing method thereof Jul 29, 2018 Issued
Array ( [id] => 13571525 [patent_doc_number] => 20180337310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => LIGHT EMITTING DIODE WITH BRAGG REFLECTOR [patent_app_type] => utility [patent_app_number] => 16/049771 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/049771
LIGHT EMITTING DIODE WITH BRAGG REFLECTOR Jul 29, 2018 Abandoned
Array ( [id] => 13571093 [patent_doc_number] => 20180337094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => THRESHOLD VOLTAGE ADJUSTMENT FOR A GATE-ALL-AROUND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/048581 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048581 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048581
Threshold voltage adjustment for a gate-all-around semiconductor structure Jul 29, 2018 Issued
Array ( [id] => 18274720 [patent_doc_number] => 11613653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Dyes, dye-sensitized solar cells, and methods of making and using the same [patent_app_type] => utility [patent_app_number] => 16/634050 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 56 [patent_no_of_words] => 23174 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16634050 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/634050
Dyes, dye-sensitized solar cells, and methods of making and using the same Jul 25, 2018 Issued
Array ( [id] => 17107601 [patent_doc_number] => 11127829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/641584 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5572 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16641584 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/641584
Semiconductor device Jul 25, 2018 Issued
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