Search

Nicholas A. Smith

Examiner (ID: 15161, Phone: (571)272-8760 , Office: P/1754 )

Most Active Art Unit
1754
Art Unit(s)
1754, 4145, 1723, 1795, 1794, 1752, 1753, 4100, 1742
Total Applications
1294
Issued Applications
796
Pending Applications
89
Abandoned Applications
418

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19084177 [patent_doc_number] => 20240110978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR CHIP AND SEQUENCE CHECKING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/190144 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190144
Semiconductor chip and sequence checking circuit Mar 26, 2023 Issued
Array ( [id] => 18661023 [patent_doc_number] => 20230307036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Storage and Accessing Methods for Parameters in Streaming AI Accelerator Chip [patent_app_type] => utility [patent_app_number] => 18/184686 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184686
Storage and accessing methods for parameters in streaming AI accelerator chip Mar 15, 2023 Issued
Array ( [id] => 20080593 [patent_doc_number] => 12354668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Programming method for semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 18/090444 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090444
Programming method for semiconductor device and semiconductor device Dec 27, 2022 Issued
Array ( [id] => 18898352 [patent_doc_number] => 20240013837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/071979 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071979
Memory device and operating method of the memory device Nov 29, 2022 Issued
Array ( [id] => 18439686 [patent_doc_number] => 20230186981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/993364 [patent_app_country] => US [patent_app_date] => 2022-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17993364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/993364
Semiconductor device Nov 22, 2022 Issued
Array ( [id] => 18251240 [patent_doc_number] => 20230078279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => APPARATUS AND METHOD WITH IN-MEMORY PROCESSING [patent_app_type] => utility [patent_app_number] => 17/992143 [patent_app_country] => US [patent_app_date] => 2022-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/992143
Apparatus and method with in-memory processing Nov 21, 2022 Issued
Array ( [id] => 18839960 [patent_doc_number] => 11848038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Self-reference sensing for memory cells [patent_app_type] => utility [patent_app_number] => 17/986522 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11284 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986522
Self-reference sensing for memory cells Nov 13, 2022 Issued
Array ( [id] => 18379462 [patent_doc_number] => 20230154551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE FOR IMPROVING RETENTION PERFORMANCE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/983705 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983705
Semiconductor device for improving retention performance and operating method thereof Nov 8, 2022 Issued
Array ( [id] => 18661062 [patent_doc_number] => 20230307075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => eFUSE OTP MEMORY DEVICE INCLUDING SERIAL INTERFACE LOGIC AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/977221 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977221
eFuse OTP memory device including serial interface logic and operation method thereof Oct 30, 2022 Issued
Array ( [id] => 18874459 [patent_doc_number] => 11862280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Memory array decoding and interconnects [patent_app_type] => utility [patent_app_number] => 17/970759 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 89 [patent_no_of_words] => 44339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970759 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970759
Memory array decoding and interconnects Oct 20, 2022 Issued
Array ( [id] => 20624755 [patent_doc_number] => 12592267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Magnetoresistive memory device and method of operating same using phase controlled magnetic anisotropy [patent_app_type] => utility [patent_app_number] => 18/048121 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048121 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048121
Magnetoresistive memory device and method of operating same using phase controlled magnetic anisotropy Oct 19, 2022 Issued
Array ( [id] => 19305248 [patent_doc_number] => 20240233828 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/970315 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8448 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970315
Apparatus with multi-bit cell read mechanism and methods for operating the same Oct 19, 2022 Issued
Array ( [id] => 19733560 [patent_doc_number] => 12211560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Fast two-sided corrective read operation in a memory device [patent_app_type] => utility [patent_app_number] => 17/969915 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969915
Fast two-sided corrective read operation in a memory device Oct 19, 2022 Issued
Array ( [id] => 19305248 [patent_doc_number] => 20240233828 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/970315 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8448 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970315
Apparatus with multi-bit cell read mechanism and methods for operating the same Oct 19, 2022 Issued
Array ( [id] => 19732756 [patent_doc_number] => 12210754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Modular memory architecture with more significant bit sub-array word line activation in single-cycle read-modify-write operation dependent on less significant bit sub-array data content [patent_app_type] => utility [patent_app_number] => 17/965243 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9723 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965243
Modular memory architecture with more significant bit sub-array word line activation in single-cycle read-modify-write operation dependent on less significant bit sub-array data content Oct 12, 2022 Issued
Array ( [id] => 18284925 [patent_doc_number] => 20230100397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DIE VOLTAGE REGULATION [patent_app_type] => utility [patent_app_number] => 17/959730 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959730 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959730
Voltage generation and regulation across multiple dies Oct 3, 2022 Issued
Array ( [id] => 19183599 [patent_doc_number] => 11990195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Semiconductor device with selective command delay and associated methods and systems [patent_app_type] => utility [patent_app_number] => 17/935057 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11483 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17935057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/935057
Semiconductor device with selective command delay and associated methods and systems Sep 22, 2022 Issued
Array ( [id] => 19070840 [patent_doc_number] => 20240105266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => NON-VOLATILE MEMORY DEVICES AND DATA ERASING METHODS [patent_app_type] => utility [patent_app_number] => 17/950931 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950931
Non-volatile memory devices and data erasing methods Sep 21, 2022 Issued
Array ( [id] => 18139581 [patent_doc_number] => 20230013417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => APPARATUSES AND METHODS OF POWER SUPPLY CONTROL FOR THRESHOLD VOLTAGE COMPENSATED SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 17/948057 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948057
Apparatuses and methods of power supply control for threshold voltage compensated sense amplifiers Sep 18, 2022 Issued
Array ( [id] => 19720130 [patent_doc_number] => 12205673 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => Read data strobe path having variation compensation and delay lines [patent_app_type] => utility [patent_app_number] => 17/945902 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945902 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945902
Read data strobe path having variation compensation and delay lines Sep 14, 2022 Issued
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