Search

Nicholas Ieva

Examiner (ID: 15104)

Most Active Art Unit
2836
Art Unit(s)
2836
Total Applications
229
Issued Applications
124
Pending Applications
4
Abandoned Applications
102

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17025501 [patent_doc_number] => 20210249373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/008513 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008513 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/008513
Semiconductor device and semiconductor device manufacturing method Aug 30, 2020 Issued
Array ( [id] => 17500421 [patent_doc_number] => 11289130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/997986 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7036 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997986 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997986
Memory device Aug 19, 2020 Issued
Array ( [id] => 16509091 [patent_doc_number] => 20200388347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => COMPUTATIONAL ANALYSIS OF BIOLOGICAL DATA USING MANIFOLD AND A HYPERPLANE [patent_app_type] => utility [patent_app_number] => 16/998006 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998006 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998006
Computational analysis of biological data using manifold and a hyperplane Aug 19, 2020 Issued
Array ( [id] => 17730934 [patent_doc_number] => 11387336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Drain and/or gate interconnect and finger structure [patent_app_type] => utility [patent_app_number] => 16/998287 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 17303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998287
Drain and/or gate interconnect and finger structure Aug 19, 2020 Issued
Array ( [id] => 17730934 [patent_doc_number] => 11387336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Drain and/or gate interconnect and finger structure [patent_app_type] => utility [patent_app_number] => 16/998287 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 17303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998287
Drain and/or gate interconnect and finger structure Aug 19, 2020 Issued
Array ( [id] => 17730934 [patent_doc_number] => 11387336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Drain and/or gate interconnect and finger structure [patent_app_type] => utility [patent_app_number] => 16/998287 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 17303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998287
Drain and/or gate interconnect and finger structure Aug 19, 2020 Issued
Array ( [id] => 17730934 [patent_doc_number] => 11387336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Drain and/or gate interconnect and finger structure [patent_app_type] => utility [patent_app_number] => 16/998287 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 17303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998287
Drain and/or gate interconnect and finger structure Aug 19, 2020 Issued
Array ( [id] => 16487767 [patent_doc_number] => 20200381376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => ELECTRONIC CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/997572 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997572 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997572
ELECTRONIC CIRCUIT Aug 18, 2020 Abandoned
Array ( [id] => 17470266 [patent_doc_number] => 11276749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => High density IC capacitor structure [patent_app_type] => utility [patent_app_number] => 16/985844 [patent_app_country] => US [patent_app_date] => 2020-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6773 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16985844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/985844
High density IC capacitor structure Aug 4, 2020 Issued
Array ( [id] => 17971351 [patent_doc_number] => 11488899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Package device [patent_app_type] => utility [patent_app_number] => 16/941516 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6965 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16941516 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/941516
Package device Jul 27, 2020 Issued
Array ( [id] => 17652896 [patent_doc_number] => 11355638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Semiconductor device and a method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/939655 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 7414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16939655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/939655
Semiconductor device and a method for fabricating the same Jul 26, 2020 Issued
Array ( [id] => 17893260 [patent_doc_number] => 11456242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Semiconductor device with stress-relieving structures and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/934833 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 9928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934833
Semiconductor device with stress-relieving structures and method for fabricating the same Jul 20, 2020 Issued
Array ( [id] => 17862836 [patent_doc_number] => 11443997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/933806 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933806
Semiconductor package and method of manufacturing the same Jul 19, 2020 Issued
Array ( [id] => 17359963 [patent_doc_number] => 20220020759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => Integrated Circuitry, A Method Used In Forming Integrated Circuitry, And A Method Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 16/930843 [patent_app_country] => US [patent_app_date] => 2020-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16930843 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/930843
Integrated circuitry, a method used in forming integrated circuitry, and a method used in forming a memory array comprising strings of memory cells Jul 15, 2020 Issued
Array ( [id] => 17174159 [patent_doc_number] => 20210327830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING DECOUPLING CAPACITOR [patent_app_type] => utility [patent_app_number] => 16/924836 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924836
Semiconductor package including decoupling capacitor Jul 8, 2020 Issued
Array ( [id] => 17574147 [patent_doc_number] => 11322421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Package structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/924208 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 6762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924208 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924208
Package structure and method of forming the same Jul 8, 2020 Issued
Array ( [id] => 17620285 [patent_doc_number] => 11339324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Metal-assisted delayed fluorescent materials as co-host materials for fluorescent OLEDs [patent_app_type] => utility [patent_app_number] => 16/921301 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921301 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921301
Metal-assisted delayed fluorescent materials as co-host materials for fluorescent OLEDs Jul 5, 2020 Issued
Array ( [id] => 18175173 [patent_doc_number] => 11574890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor devices and methods of manufacturing semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/918074 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 12134 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918074 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918074
Semiconductor devices and methods of manufacturing semiconductor devices Jun 30, 2020 Issued
Array ( [id] => 17590696 [patent_doc_number] => 11328973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Power semiconductor devices with high temperature electrical insulation [patent_app_type] => utility [patent_app_number] => 16/912890 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10076 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912890
Power semiconductor devices with high temperature electrical insulation Jun 25, 2020 Issued
Array ( [id] => 16819858 [patent_doc_number] => 11004696 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-11 [patent_title] => Method for manufacturing power diode [patent_app_type] => utility [patent_app_number] => 16/908637 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2296 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908637 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908637
Method for manufacturing power diode Jun 21, 2020 Issued
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