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Nicholas Ieva

Examiner (ID: 15104)

Most Active Art Unit
2836
Art Unit(s)
2836
Total Applications
229
Issued Applications
124
Pending Applications
4
Abandoned Applications
102

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16364557 [patent_doc_number] => 20200321308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/904167 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26752 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904167 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/904167
Semiconductor device and method for manufacturing semiconductor device Jun 16, 2020 Issued
Array ( [id] => 18431658 [patent_doc_number] => 11676888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/900646 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 4386 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/900646
Semiconductor devices Jun 11, 2020 Issued
Array ( [id] => 17270297 [patent_doc_number] => 11195725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Dry etch process landing on metal oxide etch stop layer over metal layer and structure formed thereby [patent_app_type] => utility [patent_app_number] => 16/897357 [patent_app_country] => US [patent_app_date] => 2020-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 9285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897357 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/897357
Dry etch process landing on metal oxide etch stop layer over metal layer and structure formed thereby Jun 9, 2020 Issued
Array ( [id] => 16332400 [patent_doc_number] => 20200303366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => INTEGRATED CIRCUIT FILLER AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/946160 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/946160
Integrated circuit filler and method thereof Jun 7, 2020 Issued
Array ( [id] => 18175103 [patent_doc_number] => 11574820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor devices with flexible reinforcement structure [patent_app_type] => utility [patent_app_number] => 16/896043 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16896043 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/896043
Semiconductor devices with flexible reinforcement structure Jun 7, 2020 Issued
Array ( [id] => 16332496 [patent_doc_number] => 20200303462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MEMORY CELLS HAVING RESISTORS AND FORMATION OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/892459 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892459 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/892459
Memory cells having resistors and formation of the same Jun 3, 2020 Issued
Array ( [id] => 16881284 [patent_doc_number] => 11031441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Electro-optical device, manufacturing method of electro-optical device, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/887372 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 17170 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16887372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/887372
Electro-optical device, manufacturing method of electro-optical device, and electronic apparatus May 28, 2020 Issued
Array ( [id] => 17262841 [patent_doc_number] => 20210375826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/886698 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886698
Semiconductor structure and method of fabricating the same May 27, 2020 Issued
Array ( [id] => 16765532 [patent_doc_number] => 20210111114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/884212 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884212 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884212
Semiconductor package May 26, 2020 Issued
Array ( [id] => 17262860 [patent_doc_number] => 20210375845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => PACKAGE CAVITY FOR ENHANCED DEVICE PERFORMANCE WITH AN INTEGRATED PASSIVE DEVICE [patent_app_type] => utility [patent_app_number] => 16/885171 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5284 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885171 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885171
PACKAGE CAVITY FOR ENHANCED DEVICE PERFORMANCE WITH AN INTEGRATED PASSIVE DEVICE May 26, 2020 Abandoned
Array ( [id] => 17772452 [patent_doc_number] => 11404404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Semiconductor structure having photonic die and electronic die [patent_app_type] => utility [patent_app_number] => 16/885242 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885242
Semiconductor structure having photonic die and electronic die May 26, 2020 Issued
Array ( [id] => 17738079 [patent_doc_number] => 20220223541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => INTEGRATED PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/613057 [patent_app_country] => US [patent_app_date] => 2020-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17613057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/613057
Integrated package structure May 24, 2020 Issued
Array ( [id] => 17395882 [patent_doc_number] => 11244906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Semiconductor structure and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/881002 [patent_app_country] => US [patent_app_date] => 2020-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 9883 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16881002 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/881002
Semiconductor structure and method of fabricating the same May 21, 2020 Issued
Array ( [id] => 16739032 [patent_doc_number] => 10964698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Field effect transistor with decoupled channel and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/879586 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 8556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879586
Field effect transistor with decoupled channel and methods of manufacturing the same May 19, 2020 Issued
Array ( [id] => 16332553 [patent_doc_number] => 20200303519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => Field Effect Transistor Based on Vertically Integrated Gate-All-Round Multiple Nanowire Channels [patent_app_type] => utility [patent_app_number] => 15/930804 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/930804
Field effect transistor based on vertically integrated gate-all-round multiple nanowire channels May 12, 2020 Issued
Array ( [id] => 17048182 [patent_doc_number] => 11101372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Double-sided vertical power transistor structure [patent_app_type] => utility [patent_app_number] => 16/872534 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 113 [patent_no_of_words] => 39172 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872534 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872534
Double-sided vertical power transistor structure May 11, 2020 Issued
Array ( [id] => 17559081 [patent_doc_number] => 11315803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Stress mitigation in organic laminates [patent_app_type] => utility [patent_app_number] => 16/872909 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 9523 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872909 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872909
Stress mitigation in organic laminates May 11, 2020 Issued
Array ( [id] => 17544129 [patent_doc_number] => 11309263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Semiconductor device structure with air gap structure and method for preparing the same [patent_app_type] => utility [patent_app_number] => 16/871923 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871923 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/871923
Semiconductor device structure with air gap structure and method for preparing the same May 10, 2020 Issued
Array ( [id] => 17978689 [patent_doc_number] => 11495561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Multilayer electrical conductors for transfer printing [patent_app_type] => utility [patent_app_number] => 16/872335 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 9814 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872335
Multilayer electrical conductors for transfer printing May 10, 2020 Issued
Array ( [id] => 16752477 [patent_doc_number] => 20210104489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-08 [patent_title] => WAFER LEVEL PACKAGE [patent_app_type] => utility [patent_app_number] => 16/869988 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869988 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869988
Wafer level package May 7, 2020 Issued
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