| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 9296925
[patent_doc_number] => 20140040559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SYSTEM AND METHOD OF CACHING INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/048869
[patent_app_country] => US
[patent_app_date] => 2013-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8515
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048869
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048869 | System and method of selectively caching information based on the interarrival time of requests for the same information | Oct 7, 2013 | Issued |
Array
(
[id] => 9296925
[patent_doc_number] => 20140040559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SYSTEM AND METHOD OF CACHING INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/048869
[patent_app_country] => US
[patent_app_date] => 2013-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8515
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048869
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048869 | System and method of selectively caching information based on the interarrival time of requests for the same information | Oct 7, 2013 | Issued |
Array
(
[id] => 9296925
[patent_doc_number] => 20140040559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SYSTEM AND METHOD OF CACHING INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/048869
[patent_app_country] => US
[patent_app_date] => 2013-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8515
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048869
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048869 | System and method of selectively caching information based on the interarrival time of requests for the same information | Oct 7, 2013 | Issued |
Array
(
[id] => 9296925
[patent_doc_number] => 20140040559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-06
[patent_title] => 'SYSTEM AND METHOD OF CACHING INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/048869
[patent_app_country] => US
[patent_app_date] => 2013-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8515
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14048869
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048869 | System and method of selectively caching information based on the interarrival time of requests for the same information | Oct 7, 2013 | Issued |
Array
(
[id] => 9658679
[patent_doc_number] => 20140229685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'COHERENT ATTACHED PROCESSOR PROXY SUPPORTING COHERENCE STATE UPDATE IN PRESENCE OF DISPATCHED MASTER'
[patent_app_type] => utility
[patent_app_number] => 14/037512
[patent_app_country] => US
[patent_app_date] => 2013-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12796
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14037512
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/037512 | Coherent attached processor proxy supporting coherence state update in presence of dispatched master | Sep 25, 2013 | Issued |
Array
(
[id] => 9912037
[patent_doc_number] => 20150067240
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-05
[patent_title] => 'STORAGE APPARATUS AND ITS DATA PROCESSING METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/352486
[patent_app_country] => US
[patent_app_date] => 2013-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8877
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14352486
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/352486 | Storage apparatus and its data processing method | Sep 1, 2013 | Issued |
Array
(
[id] => 9372446
[patent_doc_number] => 20140082319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-20
[patent_title] => 'FAST, DYNAMIC CACHE PACKING'
[patent_app_type] => utility
[patent_app_number] => 13/933171
[patent_app_country] => US
[patent_app_date] => 2013-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6937
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13933171
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/933171 | Fast, dynamic cache packing | Jul 1, 2013 | Issued |
Array
(
[id] => 9137125
[patent_doc_number] => 20130297840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-07
[patent_title] => 'INTELLIGENT ELECTRONIC DEVICE CAPABLE OF OPERATING AS A USB MASTER DEVICE AND A USB SLAVE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/834737
[patent_app_country] => US
[patent_app_date] => 2013-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 7918
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834737
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/834737 | INTELLIGENT ELECTRONIC DEVICE CAPABLE OF OPERATING AS A USB MASTER DEVICE AND A USB SLAVE DEVICE | Mar 14, 2013 | Abandoned |
Array
(
[id] => 8918018
[patent_doc_number] => 20130179643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-11
[patent_title] => 'OBSCURING MEMORY ACCESS PATTERNS IN CONJUNCTION WITH DEADLOCK DETECTION OR AVOIDANCE'
[patent_app_type] => utility
[patent_app_number] => 13/782416
[patent_app_country] => US
[patent_app_date] => 2013-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8259
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13782416
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/782416 | Obscuring memory access patterns in conjunction with deadlock detection or avoidance | Feb 28, 2013 | Issued |
Array
(
[id] => 12195333
[patent_doc_number] => 09899066
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Priority based backup in nonvolatile logic arrays'
[patent_app_type] => utility
[patent_app_number] => 13/770004
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 19935
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770004
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770004 | Priority based backup in nonvolatile logic arrays | Feb 18, 2013 | Issued |
Array
(
[id] => 9071004
[patent_doc_number] => 20130262760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'RAID DATA STORAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/770271
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5217
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770271
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770271 | RAID DATA STORAGE SYSTEM | Feb 18, 2013 | Abandoned |
Array
(
[id] => 8906353
[patent_doc_number] => 20130173856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-04
[patent_title] => 'DATA STORAGE DEVICE, MEMORY SYSTEM, AND COMPUTING SYSTEM USING NONVOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/770107
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5387
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770107
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770107 | Data storage device, memory system, and computing system using nonvolatile memory device | Feb 18, 2013 | Issued |
Array
(
[id] => 13173539
[patent_doc_number] => 10102889
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-16
[patent_title] => Processing device with nonvolatile logic array backup
[patent_app_type] => utility
[patent_app_number] => 13/770304
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 18201
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 281
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770304
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770304 | Processing device with nonvolatile logic array backup | Feb 18, 2013 | Issued |
Array
(
[id] => 9673330
[patent_doc_number] => 20140237193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-21
[patent_title] => 'CACHE WINDOW MANAGEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/770203
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3479
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770203
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770203 | CACHE WINDOW MANAGEMENT | Feb 18, 2013 | Abandoned |
Array
(
[id] => 9006091
[patent_doc_number] => 20130227216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'DATA STORAGE SYSTEM HAVING MULTIPLE CONTROLLER MODULES'
[patent_app_type] => utility
[patent_app_number] => 13/770284
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5041
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13770284
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770284 | DATA STORAGE SYSTEM HAVING MULTIPLE CONTROLLER MODULES | Feb 18, 2013 | Abandoned |
Array
(
[id] => 11830730
[patent_doc_number] => 09727472
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'Cache coherency and synchronization support in expanders in a raid topology with multiple initiators'
[patent_app_type] => utility
[patent_app_number] => 13/767043
[patent_app_country] => US
[patent_app_date] => 2013-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4307
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13767043
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/767043 | Cache coherency and synchronization support in expanders in a raid topology with multiple initiators | Feb 13, 2013 | Issued |
Array
(
[id] => 9658680
[patent_doc_number] => 20140229684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'COHERENT ATTACHED PROCESSOR PROXY SUPPORTING COHERENCE STATE UPDATE IN PRESENCE OF DISPATCHED MASTER'
[patent_app_type] => utility
[patent_app_number] => 13/767256
[patent_app_country] => US
[patent_app_date] => 2013-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12746
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13767256
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/767256 | Coherent attached processor proxy supporting coherence state update in presence of dispatched master | Feb 13, 2013 | Issued |
Array
(
[id] => 9658695
[patent_doc_number] => 20140229701
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'DETERMINING A METRIC CONSIDERING UNALLOCATED VIRTUAL STORAGE SPACE AND REMAINING PHYSICAL STORAGE SPACE TO USE TO DETERMINE WHETHER TO GENERATE A LOW SPACE ALERT'
[patent_app_type] => utility
[patent_app_number] => 13/767823
[patent_app_country] => US
[patent_app_date] => 2013-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4378
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13767823
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/767823 | Determining a metric considering unallocated virtual storage space and remaining physical storage space to use to determine whether to generate a low space alert | Feb 13, 2013 | Issued |
Array
(
[id] => 8978908
[patent_doc_number] => 20130212338
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-15
[patent_title] => 'MULTICORE PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 13/767333
[patent_app_country] => US
[patent_app_date] => 2013-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2979
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13767333
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/767333 | MULTICORE PROCESSOR | Feb 13, 2013 | Abandoned |
Array
(
[id] => 10922136
[patent_doc_number] => 20140325156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-30
[patent_title] => 'Long Latency Tolerant Decoupled Memory Hierarchy for Simpler and Energy Efficient Designs'
[patent_app_type] => utility
[patent_app_number] => 14/366487
[patent_app_country] => US
[patent_app_date] => 2012-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8198
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14366487
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/366487 | Long Latency Tolerant Decoupled Memory Hierarchy for Simpler and Energy Efficient Designs | Dec 16, 2012 | Abandoned |