Search

Nicholas J. Simonetti

Examiner (ID: 5941, Phone: (571)270-7702 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2137, 2187
Total Applications
616
Issued Applications
474
Pending Applications
43
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18644708 [patent_doc_number] => 11768776 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-26 [patent_title] => Evicting data associated with a data intake and query system from a local storage [patent_app_type] => utility [patent_app_number] => 18/045421 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 35 [patent_no_of_words] => 48496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045421 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045421
Evicting data associated with a data intake and query system from a local storage Oct 9, 2022 Issued
Array ( [id] => 19099589 [patent_doc_number] => 20240118817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => METHOD FOR POWER REDUCTION IN MEMORY MODULES [patent_app_type] => utility [patent_app_number] => 17/962387 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6527 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962387
Method for power reduction in memory modules Oct 6, 2022 Issued
Array ( [id] => 19355923 [patent_doc_number] => 12056369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Refreshing a memory block on power up based on an age and/or temperature condition [patent_app_type] => utility [patent_app_number] => 17/934940 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 23925 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934940
Refreshing a memory block on power up based on an age and/or temperature condition Sep 22, 2022 Issued
Array ( [id] => 19375663 [patent_doc_number] => 12067233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Method and system for tuning a memory device for high-speed transitions [patent_app_type] => utility [patent_app_number] => 17/933944 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933944
Method and system for tuning a memory device for high-speed transitions Sep 20, 2022 Issued
Array ( [id] => 19052940 [patent_doc_number] => 20240094909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => MIGRATION OF DATA TO MAINTAIN DATA RESILIENCY [patent_app_type] => utility [patent_app_number] => 17/934060 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934060 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934060
Migration of data to maintain data resiliency Sep 20, 2022 Issued
Array ( [id] => 19052975 [patent_doc_number] => 20240094944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => IMPLEMENTING DATA FLOWS OF AN APPLICATION ACROSS A MEMORY HIERARCHY OF A DATA PROCESSING ARRAY [patent_app_type] => utility [patent_app_number] => 17/934153 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934153
Implementing data flows of an application across a memory hierarchy of a data processing array Sep 20, 2022 Issued
Array ( [id] => 19780370 [patent_doc_number] => 12229403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Hybrid logical to physical mapping for ZNS based SSDs [patent_app_type] => utility [patent_app_number] => 17/933720 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 20786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933720
Hybrid logical to physical mapping for ZNS based SSDs Sep 19, 2022 Issued
Array ( [id] => 19595952 [patent_doc_number] => 12153799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Memory controller and method for bit flipping of low-density parity-check codes [patent_app_type] => utility [patent_app_number] => 17/933183 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6330 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933183
Memory controller and method for bit flipping of low-density parity-check codes Sep 18, 2022 Issued
Array ( [id] => 18438431 [patent_doc_number] => 20230185726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => INFORMATION PROCESSING APPARATUS AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/931746 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931746 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931746
Information processing apparatus and control method Sep 12, 2022 Issued
Array ( [id] => 19739746 [patent_doc_number] => 12216576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Method and apparatus to reduce cache stampeding [patent_app_type] => utility [patent_app_number] => 17/880481 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3155 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880481
Method and apparatus to reduce cache stampeding Aug 2, 2022 Issued
Array ( [id] => 17992931 [patent_doc_number] => 20220358968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => DATA STORAGE LIBRARY WITH MEDIA ACCLIMATION DEVICE AND METHODS OF ACCLIMATING DATA STORAGE MEDIA [patent_app_type] => utility [patent_app_number] => 17/870194 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870194
Acclimating data storage media and components in a data storage library Jul 20, 2022 Issued
Array ( [id] => 18422323 [patent_doc_number] => 20230176787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => INFORMATION PROCESSING SYSTEM AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/870600 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870600 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870600
Information processing system and memory system Jul 20, 2022 Issued
Array ( [id] => 18346156 [patent_doc_number] => 20230134266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => Storage Operation Routing in a Container System [patent_app_type] => utility [patent_app_number] => 17/853466 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 47127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853466 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853466
Storage operation routing in a container system Jun 28, 2022 Issued
Array ( [id] => 18095367 [patent_doc_number] => 20220413708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Optimized I/O Performance Regulation for Non-Volatile Storage [patent_app_type] => utility [patent_app_number] => 17/850020 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850020 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850020
Optimized I/O performance regulation for non-volatile storage Jun 26, 2022 Issued
Array ( [id] => 18173991 [patent_doc_number] => 11573700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Buffer management in memory systems for read and write requests [patent_app_type] => utility [patent_app_number] => 17/846732 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 12813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846732
Buffer management in memory systems for read and write requests Jun 21, 2022 Issued
Array ( [id] => 19391284 [patent_doc_number] => 20240281154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => DRAM REFRESH CONTROL WITH MASTER WORDLINE GRANULARITY OF REFRESH INTERVALS [patent_app_type] => utility [patent_app_number] => 18/569518 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18569518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/569518
DRAM refresh control with master wordline granularity of refresh intervals Jun 20, 2022 Issued
Array ( [id] => 18873377 [patent_doc_number] => 11861187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Method and device for determining memory power consumption, storage medium and electronic device [patent_app_type] => utility [patent_app_number] => 17/840932 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840932 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840932
Method and device for determining memory power consumption, storage medium and electronic device Jun 14, 2022 Issued
Array ( [id] => 18614190 [patent_doc_number] => 20230280927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => METHOD AND APPARATUS FOR TESTING MEMORY CHIP, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/663767 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663767
Method and apparatus for testing memory chip, and storage medium May 16, 2022 Issued
Array ( [id] => 18203970 [patent_doc_number] => 11586361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Adaptive memory system [patent_app_type] => utility [patent_app_number] => 17/663609 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13563 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663609
Adaptive memory system May 15, 2022 Issued
Array ( [id] => 17839488 [patent_doc_number] => 20220276793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => POWER MANAGEMENT BASED ON DETECTED VOLTAGE PARAMETER LEVELS IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/745389 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745389
Power management based on detected voltage parameter levels in a memory sub-system May 15, 2022 Issued
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