Search

Nicole Erin Kinsey White

Examiner (ID: 11555, Phone: (571)272-9943 , Office: P/1648 )

Most Active Art Unit
1648
Art Unit(s)
1648, 1672, 1671
Total Applications
1138
Issued Applications
564
Pending Applications
130
Abandoned Applications
476

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16323140 [patent_doc_number] => 10783106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => USB autorun device [patent_app_type] => utility [patent_app_number] => 15/229200 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 45 [patent_no_of_words] => 25042 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229200 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229200
USB autorun device Aug 4, 2016 Issued
Array ( [id] => 11292622 [patent_doc_number] => 20160342554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'USB AUTORUN DEVICE' [patent_app_type] => utility [patent_app_number] => 15/229163 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 26069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229163 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229163
USB AUTORUN DEVICE Aug 4, 2016 Abandoned
Array ( [id] => 11292604 [patent_doc_number] => 20160342536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'USB AUTORUN DEVICE' [patent_app_type] => utility [patent_app_number] => 15/229195 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 26069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229195 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229195
USB AUTORUN DEVICE Aug 4, 2016 Abandoned
Array ( [id] => 16278999 [patent_doc_number] => 10762030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Storage system, method, and apparatus for fast IO on PCIE devices [patent_app_type] => utility [patent_app_number] => 15/227961 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227961 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227961
Storage system, method, and apparatus for fast IO on PCIE devices Aug 3, 2016 Issued
Array ( [id] => 12180653 [patent_doc_number] => 20180039589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'COMMUNICATION SYSTEM FOR TRANSMITTING AND RECEIVING CONTROL FRAMES' [patent_app_type] => utility [patent_app_number] => 15/227834 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7038 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227834
Communication system for transmitting and receiving control frames Aug 2, 2016 Issued
Array ( [id] => 16171632 [patent_doc_number] => 10713202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Quality of service (QOS)-aware input/output (IO) management for peripheral component interconnect express (PCIE) storage system with reconfigurable multi-ports [patent_app_type] => utility [patent_app_number] => 15/227959 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227959 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227959
Quality of service (QOS)-aware input/output (IO) management for peripheral component interconnect express (PCIE) storage system with reconfigurable multi-ports Aug 2, 2016 Issued
Array ( [id] => 16520840 [patent_doc_number] => 10872055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Triple-data-rate technique for a synchronous link [patent_app_type] => utility [patent_app_number] => 15/226113 [patent_app_country] => US [patent_app_date] => 2016-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10486 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226113 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226113
Triple-data-rate technique for a synchronous link Aug 1, 2016 Issued
Array ( [id] => 11403805 [patent_doc_number] => 20170024344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'Method and System for USB 2.0 Bandwidth Reservation' [patent_app_type] => utility [patent_app_number] => 15/216447 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15216447 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/216447
Method and System for USB 2.0 Bandwidth Reservation Jul 20, 2016 Abandoned
Array ( [id] => 16592672 [patent_doc_number] => 10901936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Staged power on/off sequence at the I/O phy level in an interchip interface [patent_app_type] => utility [patent_app_number] => 15/215636 [patent_app_country] => US [patent_app_date] => 2016-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8557 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15215636 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/215636
Staged power on/off sequence at the I/O phy level in an interchip interface Jul 20, 2016 Issued
Array ( [id] => 11570653 [patent_doc_number] => 20170109297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'I/O BUS SHARED MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/215439 [patent_app_country] => US [patent_app_date] => 2016-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15215439 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/215439
I/O bus shared memory system Jul 19, 2016 Issued
Array ( [id] => 17091774 [patent_doc_number] => 11119964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Communication device and control method [patent_app_type] => utility [patent_app_number] => 15/580511 [patent_app_country] => US [patent_app_date] => 2016-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 17611 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15580511 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/580511
Communication device and control method Jun 1, 2016 Issued
Array ( [id] => 11316455 [patent_doc_number] => 20160352565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'MEASUREMENT SYSTEM HAVING A PLURALITY OF SENSORS' [patent_app_type] => utility [patent_app_number] => 15/167020 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4380 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167020 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/167020
MEASUREMENT SYSTEM HAVING A PLURALITY OF SENSORS May 26, 2016 Abandoned
Array ( [id] => 11354598 [patent_doc_number] => 20160373338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'STORAGE APPARATUS, CONTROL METHOD, AND CONNECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 15/164150 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13259 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164150
STORAGE APPARATUS, CONTROL METHOD, AND CONNECTION DEVICE May 24, 2016 Abandoned
Array ( [id] => 11292609 [patent_doc_number] => 20160342540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'LOW LATENCY MEMORY AND BUS FREQUENCY SCALING BASED UPON HARDWARE MONITORING' [patent_app_type] => utility [patent_app_number] => 15/159402 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9634 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159402 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159402
LOW LATENCY MEMORY AND BUS FREQUENCY SCALING BASED UPON HARDWARE MONITORING May 18, 2016 Abandoned
Array ( [id] => 12060806 [patent_doc_number] => 20170337150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'INFRASTRUCTURE MANAGEMENT SYSTEM WITH SUPPORT FOR BREAKOUT CABLES' [patent_app_type] => utility [patent_app_number] => 15/158071 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10208 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158071 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/158071
Infrastructure management system with support for breakout cables May 17, 2016 Issued
Array ( [id] => 11709016 [patent_doc_number] => 20170177515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'ELECTRONIC DEVICE AND METHOD OF DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/156566 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156566 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156566
Electronic device and method of driving the same May 16, 2016 Issued
Array ( [id] => 12053394 [patent_doc_number] => 20170329737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'TWO-WIRE LINE-MULTIPLEXED UART TO FOUR-WIRE HIGH-SPEED UART BRIDGING WITH INTEGRATED FLOW CONTROL' [patent_app_type] => utility [patent_app_number] => 15/151682 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12458 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151682 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151682
TWO-WIRE LINE-MULTIPLEXED UART TO FOUR-WIRE HIGH-SPEED UART BRIDGING WITH INTEGRATED FLOW CONTROL May 10, 2016 Abandoned
Array ( [id] => 12032795 [patent_doc_number] => 20170322894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'SYNCHRONOUS INPUT/OUTPUT COMPUTER SYSTEM INCLUDING HARDWARE INVALIDATION OF SYNCHRONOUS INPUT/OUTPUT CONTEXT' [patent_app_type] => utility [patent_app_number] => 15/149219 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149219 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149219
Synchronous input/output computer system including hardware invalidation of synchronous input/output context May 8, 2016 Issued
Array ( [id] => 12032793 [patent_doc_number] => 20170322893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'COMPUTING NODE TO INITIATE AN INTERRUPT FOR A WRITE REQUEST RECEIVED OVER A MEMORY FABRIC CHANNEL' [patent_app_type] => utility [patent_app_number] => 15/149462 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4295 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149462 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149462
COMPUTING NODE TO INITIATE AN INTERRUPT FOR A WRITE REQUEST RECEIVED OVER A MEMORY FABRIC CHANNEL May 8, 2016 Abandoned
Array ( [id] => 12032798 [patent_doc_number] => 20170322897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'SYSTEMS AND METHODS FOR PROCESSING A SUBMISSION QUEUE' [patent_app_type] => utility [patent_app_number] => 15/148409 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15148409 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/148409
SYSTEMS AND METHODS FOR PROCESSING A SUBMISSION QUEUE May 5, 2016 Abandoned
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